Bias Stability & DC Load Line
Fig 4.14 (a) Biasing Circuit
Fig 4.14(b) CE o/p Characteristics
And Load Line
The supply voltage and resistances in the circuit must be suitably chosen in order to produce distortion -free output in amplifier circuits. These voltages and resistances establish a set of values to operate the transistor in the active region. These values are called quiescent values and they determine the operating point or Q - point of the transistor. The process of giving proper supply voltages and resistances for obtaining the desired Q - point is called biasing and the circuits used for the purpose are called biasing circuits.
D.C. load line
Referring to Fig. 4.14 (a), we see that values of VCC and RC are fixed and IC and VCE are dependent on RB.
Applying Kirchoff's voltage law to the collector circuit we get,
VCC = IC RC + VCE(4.42)
The straight line represented by AB in Fig. 4.14 (b) is the d.c. load line. The co-ordinates at the end point 'A' are obtained by substituting VCE = 0 in the above equation. Then Ic= Vcc. Therefore, the co-ordinates of A are VCE =0 and Ic= Vcc/Rc
The co-ordinates of B are obtained by substituting Ic = 0 in the equation.
Then VCE =Vcc. Therefore, the co-ordinates of B are VCE =Vcc and Ic= 0.
As shown in the Fig. 4.14(b), the optimum Q-point is located at the midpoint of the d.c. load line AB between saturation and cut-off regions. In order to get faithful amplification the Q-point must be well within the active region.
However, in practice, the Q-point tends to shift its position due to the following reasons :-
(i)Reverse saturation current, Ico, which doubles for every 100C increase in temperature
(ii) Base-emitter voltage, VBE, which decreases by 2.5 mV per 0C.
(iii) Transistor current gain b, which increases with temperature.