Subject | Author | Date |
Re: [SI-LIST] : Chassis hole opening and frequencies | Erik Daniel | Mon Jan 03 2000 - 06:33:55 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Mon Jan 03 2000 - 08:39:30 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Abe Riazi | Mon Jan 03 2000 - 09:43:13 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | Adrian Shiner | Mon Jan 03 2000 - 13:06:46 PST |
[SI-LIST] : OPENING SI Engineer | JOACHIM MUELLER | Tue Jan 04 2000 - 06:39:56 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Tue Jan 04 2000 - 09:44:51 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Douglas McKean | Tue Jan 04 2000 - 10:02:14 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | Nadolny, Jim | Tue Jan 04 2000 - 10:47:16 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Peterson, James F (FL51) | Tue Jan 04 2000 - 11:09:56 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Ron Miller | Tue Jan 04 2000 - 12:22:14 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Adrian Shiner | Tue Jan 04 2000 - 11:31:30 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | Adrian Shiner | Tue Jan 04 2000 - 11:23:24 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Jay Chesavage | Tue Jan 04 2000 - 13:23:28 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | Adrian Shiner | Tue Jan 04 2000 - 13:35:29 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Tue Jan 04 2000 - 13:45:46 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | D. C. Sessions | Tue Jan 04 2000 - 13:51:01 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | Chan, Michael | Tue Jan 04 2000 - 14:25:36 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Volk, Andrew M | Tue Jan 04 2000 - 14:34:51 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | D. C. Sessions | Tue Jan 04 2000 - 14:56:39 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Tue Jan 04 2000 - 15:08:58 PST |
[SI-LIST] : Re: OPENING: Signal Integrity Engineer, Juniper Networks | Heinz Blennemann | Tue Jan 04 2000 - 15:26:47 PST |
[SI-LIST] : SI Manager position | Hank Zauderer | Tue Jan 04 2000 - 17:03:03 PST |
Re: [SI-LIST] : SI Manager position | Dan Bostan | Tue Jan 04 2000 - 18:30:47 PST |
Re: [SI-LIST] : SI Manager position | [email protected] | Tue Jan 04 2000 - 18:41:01 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Daren McClearnon | Tue Jan 04 2000 - 19:54:02 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Abe Riazi | Tue Jan 04 2000 - 22:57:25 PST |
[SI-LIST] : What's your favourite Screwy SI Concept? | Andrew Phillips | Wed Jan 05 2000 - 05:17:07 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Ingraham, Andrew | Wed Jan 05 2000 - 06:18:28 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | [email protected] | Wed Jan 05 2000 - 08:32:16 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Wed Jan 05 2000 - 09:25:08 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Larry Smith | Wed Jan 05 2000 - 09:25:53 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Wed Jan 05 2000 - 09:13:47 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Doug Brooks | Wed Jan 05 2000 - 09:46:32 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Ingraham, Andrew | Wed Jan 05 2000 - 09:52:09 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Abe Riazi | Wed Jan 05 2000 - 10:27:01 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Wed Jan 05 2000 - 11:25:41 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Adrian Shiner | Wed Jan 05 2000 - 11:50:13 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Adrian Shiner | Wed Jan 05 2000 - 11:40:07 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Adrian Shiner | Wed Jan 05 2000 - 11:57:35 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Adrian Shiner | Wed Jan 05 2000 - 11:33:44 PST |
[SI-LIST] : low ESR decoupling capacitors | Larry Smith | Wed Jan 05 2000 - 12:19:33 PST |
[SI-LIST] : Update on SI manager position... | Hank Zauderer | Wed Jan 05 2000 - 12:24:55 PST |
Re: [SI-LIST] : low ESR decoupling capacitors | D. C. Sessions | Wed Jan 05 2000 - 13:00:37 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Douglas McKean | Wed Jan 05 2000 - 13:39:59 PST |
Re: [SI-LIST] : low ESR decoupling capacitors | Larry Smith | Wed Jan 05 2000 - 13:46:08 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Dr. Edward P. Sayre | Wed Jan 05 2000 - 14:19:28 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | [email protected] | Wed Jan 05 2000 - 15:22:05 PST |
[SI-LIST] : What's your favorite Screwy SI Concept? : low ESR decoupling capacitors | [email protected] | Wed Jan 05 2000 - 15:48:34 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Jon Powell | Wed Jan 05 2000 - 16:12:49 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Jay Chesavage | Thu Jan 06 2000 - 05:40:48 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Ingraham, Andrew | Thu Jan 06 2000 - 08:21:08 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Ingraham, Andrew | Thu Jan 06 2000 - 08:32:42 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Doug Smith | Thu Jan 06 2000 - 10:27:43 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Jon Powell | Thu Jan 06 2000 - 10:49:53 PST |
Re: [SI-LIST] : low ESR decoupling capacitors | Adrian Shiner | Thu Jan 06 2000 - 11:10:02 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? : low ESR decoupling capacitors | Adrian Shiner | Thu Jan 06 2000 - 11:12:48 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Thu Jan 06 2000 - 11:09:59 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Haller, Robert | Thu Jan 06 2000 - 11:35:27 PST |
RE: [SI-LIST] : low ESR decoupling capacitors | [email protected] | Thu Jan 06 2000 - 11:32:56 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | Matt (boomer) Russell | Thu Jan 06 2000 - 11:36:57 PST |
Re: [SI-LIST] : low ESR decoupling capacitors | D. C. Sessions | Thu Jan 06 2000 - 11:42:28 PST |
Re: [SI-LIST] : Input switching threshold & CPCI | D. C. Sessions | Thu Jan 06 2000 - 12:23:28 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Muranyi, Arpad | Thu Jan 06 2000 - 12:46:53 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Ingraham, Andrew | Thu Jan 06 2000 - 12:56:07 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Lee Ritchey | Thu Jan 06 2000 - 14:57:10 PST |
[SI-LIST] : Job Posting: Agilent Technologies (formerly HP) Fiber-Optics App lications Engineers | LATOURRETTE,JEFF (HP-SanJose,ex1) | Thu Jan 06 2000 - 19:15:33 PST |
[SI-LIST] : questions about Spicelink/Ansoft tools | Teddy Chou | Thu Jan 06 2000 - 19:25:47 PST |
[SI-LIST] : Method of measuring characteristics of a capacitor | Doug Smith | Fri Jan 07 2000 - 10:56:10 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Dave Hoover | Thu Jan 06 2000 - 12:42:55 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Fri Jan 07 2000 - 12:34:55 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Chan, Michael | Fri Jan 07 2000 - 13:21:30 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Fri Jan 07 2000 - 15:32:11 PST |
Re: [SI-LIST] : Method of measuring characteristics of a capacitor | add automation | Fri Jan 07 2000 - 15:57:04 PST |
RE: [SI-LIST] : Input switching threshold & CPCI | Abe Riazi | Fri Jan 07 2000 - 17:13:14 PST |
RE: [SI-LIST] : Method of measuring characteristics of a capacito r | Cruz, Jose | Sat Jan 08 2000 - 05:48:01 PST |
Re: [SI-LIST] : Method of measuring characteristics of a capacitor | Douglas C. Smith | Sat Jan 08 2000 - 12:38:45 PST |
[SI-LIST] : si-list archives | Ray Anderson | Sat Jan 08 2000 - 13:20:28 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Lee Ritchey | Sat Jan 08 2000 - 16:53:06 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Sat Jan 08 2000 - 19:36:14 PST |
[SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Ingraham, Andrew | Sat Jan 08 2000 - 20:23:33 PST |
Re: [SI-LIST] : low ESR decoupling capacitors | Adrian Shiner | Fri Jan 07 2000 - 12:52:53 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Jay Chesavage | Sun Jan 09 2000 - 01:25:21 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Sun Jan 09 2000 - 15:18:39 PST |
[SI-LIST] : 20-H RULE CONTINUED | WMA | Sun Jan 09 2000 - 17:57:55 PST |
RE: [SI-LIST] : Clamp diodes in models | Abe Riazi | Sun Jan 09 2000 - 23:54:29 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Bradley S Henson | Mon Jan 10 2000 - 07:55:54 PST |
Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Bradley S Henson | Mon Jan 10 2000 - 08:02:29 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Lee Ritchey | Mon Jan 10 2000 - 08:53:57 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Lee Ritchey | Mon Jan 10 2000 - 08:52:17 PST |
Re: [SI-LIST] : 20-H RULE CONTINUED | Lee Ritchey | Mon Jan 10 2000 - 09:05:05 PST |
[SI-LIST] : Clamp diodes in models (was Input switchingthreshold & CPCI) | David Haedge | Mon Jan 10 2000 - 09:09:57 PST |
[SI-LIST] : Santa Clara Valley EMC Meeting Notice 11Jan2000 | Hans Mellberg | Mon Jan 10 2000 - 09:48:02 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Tom Dagostino | Mon Jan 10 2000 - 10:23:11 PST |
RE: [SI-LIST] : Physcially-small far-end LVDS terminations? | Joel Kolstad | Mon Jan 10 2000 - 10:51:39 PST |
RE: [SI-LIST] : Signal traces without reference plane | Stephanie Goedecke | Mon Jan 10 2000 - 10:57:22 PST |
[SI-LIST] : DesignCon 2000 | Mayer, Mike | Mon Jan 10 2000 - 11:04:23 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | Mayer, Mike | Mon Jan 10 2000 - 11:05:55 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Bradley S Henson | Mon Jan 10 2000 - 11:06:05 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | Ray Waugh | Mon Jan 10 2000 - 11:08:35 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Chris Heard | Mon Jan 10 2000 - 11:10:31 PST |
[SI-LIST] : positions available | Jon Powell | Mon Jan 10 2000 - 11:14:54 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | PRDEWASTHALEE | Mon Jan 10 2000 - 11:20:17 PST |
Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Matt (boomer) Russell | Mon Jan 10 2000 - 11:20:34 PST |
[SI-LIST] : STTL3 bus terminations | Yann Noury | Mon Jan 10 2000 - 11:24:29 PST |
RE: [SI-LIST] : FCAL DB9 cable shield | Jeremy Stover | Mon Jan 10 2000 - 11:27:34 PST |
[SI-LIST] : backward Xtalk? | Long Wang | Mon Jan 10 2000 - 11:30:04 PST |
Re:[SI-LIST] : questions about Spicelink/Ansoft tools | Nirmal Jain | Mon Jan 10 2000 - 11:32:40 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Mon Jan 10 2000 - 11:34:26 PST |
Re: [SI-LIST] : DesignCon 2000 | D. C. Sessions | Mon Jan 10 2000 - 11:35:00 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switchingthresh old & CPCI) | Muranyi, Arpad | Mon Jan 10 2000 - 11:37:04 PST |
Re: [SI-LIST] : Clamp diodes in models (was Input switchingthreshold & CPCI) | [email protected] | Mon Jan 10 2000 - 11:50:36 PST |
RE: [SI-LIST] : Physcially-small far-end LVDS terminations? | Greim, Michael | Mon Jan 10 2000 - 11:58:50 PST |
[SI-LIST] : message foul-up | Ray Anderson | Mon Jan 10 2000 - 12:02:39 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Larry Smith | Mon Jan 10 2000 - 12:07:43 PST |
Re: [SI-LIST] : DesignCon 2000 | Ron Miller | Mon Jan 10 2000 - 12:11:33 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | LATOURRETTE,JEFF (HP-SanJose,ex1) | Mon Jan 10 2000 - 12:14:23 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Kim Helliwell | Mon Jan 10 2000 - 13:16:42 PST |
RE: [SI-LIST] : FCAL DB9 cable shield | Ravinder Ajmani | Mon Jan 10 2000 - 13:20:47 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | [email protected] | Mon Jan 10 2000 - 13:22:20 PST |
RE: [SI-LIST] : Physcially-small far-end LVDS terminations? | Tom Dagostino | Mon Jan 10 2000 - 11:56:20 PST |
Re: [SI-LIST] : STTL3 bus terminations | D. C. Sessions | Mon Jan 10 2000 - 14:00:01 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Harris, George | Mon Jan 10 2000 - 14:18:35 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Fred Balistreri | Mon Jan 10 2000 - 14:01:05 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | D. C. Sessions | Mon Jan 10 2000 - 14:19:36 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | Jian Zheng | Mon Jan 10 2000 - 14:29:43 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Chris Heard | Mon Jan 10 2000 - 14:35:08 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Mark Randol | Mon Jan 10 2000 - 14:53:46 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switchingthresh old & CPCI) | WAUGH,RAY (HP-SanJose,ex1) | Mon Jan 10 2000 - 15:27:47 PST |
[SI-LIST] : Clamp diodes in models | WAUGH,RAY (HP-SanJose,ex1) | Mon Jan 10 2000 - 16:03:45 PST |
Re: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Scott McMorrow | Mon Jan 10 2000 - 16:24:58 PST |
RE: [SI-LIST] : Clamp diodes in models (was Input switching threshold & CPCI) | Tom Dagostino | Mon Jan 10 2000 - 15:50:53 PST |
Re: [SI-LIST] : Chassis hole opening and frequencies | Michael Vrbanac | Mon Jan 10 2000 - 17:16:06 PST |
Re: [SI-LIST] : backward Xtalk? | Nirmal Jain | Mon Jan 10 2000 - 17:33:02 PST |
RE: [SI-LIST] : Chassis hole opening and frequencies | LATOURRETTE,JEFF (HP-SanJose,ex1) | Mon Jan 10 2000 - 13:08:11 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Aubrey Keith Sparkman | Mon Jan 10 2000 - 19:34:04 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Michael Vrbanac | Mon Jan 10 2000 - 20:49:39 PST |
[SI-LIST] : Blind Matable DB-9 connector for Fibre-Channel | Doug Piper | Mon Jan 10 2000 - 22:18:51 PST |
Re: [SI-LIST] : Signal traces without reference plane | Lee Ritchey | Tue Jan 11 2000 - 07:54:12 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Lee Ritchey | Tue Jan 11 2000 - 08:09:10 PST |
Re: [SI-LIST] : Physcially-small far-end LVDS terminations? | Lee Ritchey | Tue Jan 11 2000 - 08:19:12 PST |
[SI-LIST] : Re:Santa Clara Valley EMC Meeting Notice 11Jan2000 | Hans Mellberg | Tue Jan 11 2000 - 08:21:10 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Tue Jan 11 2000 - 08:30:32 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Doug Smith | Tue Jan 11 2000 - 14:46:24 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Grasso, Charles (Chaz) | Tue Jan 11 2000 - 16:02:53 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Chan, Michael | Tue Jan 11 2000 - 16:17:25 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Richard A. Schumacher | Tue Jan 11 2000 - 16:55:06 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Tue Jan 11 2000 - 21:09:13 PST |
[SI-LIST] : re: [SI-LIST]: What's your favorite Screwy SI Concept? | Michael Vrbanac | Tue Jan 11 2000 - 21:32:19 PST |
[SI-LIST] : Beta Field Extractor | Christian S. Rode | Wed Jan 12 2000 - 05:44:07 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | [email protected] | Wed Jan 12 2000 - 06:25:06 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Wed Jan 12 2000 - 08:42:41 PST |
[SI-LIST] : 20H Revisited | D. C. Sessions | Wed Jan 12 2000 - 09:00:29 PST |
Re: [SI-LIST] : 20H Revisited | Michael Vrbanac | Thu Jan 13 2000 - 09:08:17 PST |
[SI-LIST] : High Speed Backplane Connector Recommendations | Bruce W. Marler | Thu Jan 13 2000 - 09:40:41 PST |
Re: [SI-LIST] : 20H Revisited | Sainath Nimmagadda | Thu Jan 13 2000 - 09:40:34 PST |
Re: [SI-LIST] : 20H Revisited | Ray Anderson | Thu Jan 13 2000 - 10:15:59 PST |
Re: [SI-LIST] : 20H Revisited | Michael Vrbanac | Thu Jan 13 2000 - 10:34:41 PST |
Re: [SI-LIST] : 20H Revisited | Michael Vrbanac | Thu Jan 13 2000 - 10:45:31 PST |
[SI-LIST] : High Speed Backplane Connector Recommendations | mmunroe | Thu Jan 13 2000 - 11:30:55 PST |
Re: [SI-LIST] : 20H Revisited | Sainath Nimmagadda | Thu Jan 13 2000 - 11:45:09 PST |
Re: [SI-LIST] : 20H Revisited | Michael Vrbanac | Thu Jan 13 2000 - 13:59:22 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Jon Keeble | Thu Jan 13 2000 - 13:25:00 PST |
RE: [SI-LIST] : 20H Revisited | Alderete, Michael | Thu Jan 13 2000 - 14:39:50 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Doug McKean | Thu Jan 13 2000 - 15:33:57 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Bruce W. Marler | Thu Jan 13 2000 - 15:37:19 PST |
Re: [SI-LIST] : 20H Revisited | Sainath Nimmagadda | Thu Jan 13 2000 - 16:19:16 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Jian Zheng | Thu Jan 13 2000 - 16:32:30 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Bruce W. Marler | Thu Jan 13 2000 - 16:43:05 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | [email protected] | Thu Jan 13 2000 - 16:45:04 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Doug McKean | Thu Jan 13 2000 - 17:14:35 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Ron Miller | Thu Jan 13 2000 - 17:12:46 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | [email protected] | Thu Jan 13 2000 - 17:31:39 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Ron Miller | Thu Jan 13 2000 - 18:15:29 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Doug McKean | Thu Jan 13 2000 - 18:50:29 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | sweir | Thu Jan 13 2000 - 18:56:08 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | John Howard | Thu Jan 13 2000 - 11:25:05 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | sweir | Thu Jan 13 2000 - 19:23:23 PST |
RE: [SI-LIST] : questions about Spicelink/Ansoft tools | Teddy Chou | Fri Jan 14 2000 - 01:47:41 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Jon Keeble | Fri Jan 14 2000 - 03:23:30 PST |
RE: [SI-LIST] : High Speed Backplane Connector Recommendations | John Ellis | Fri Jan 14 2000 - 04:38:53 PST |
[SI-LIST] : XTK vs ICX | [email protected] | Fri Jan 14 2000 - 05:16:15 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Bradley S Henson | Fri Jan 14 2000 - 06:42:54 PST |
Re: [SI-LIST] : XTK vs ICX | Laurence Michaels | Fri Jan 14 2000 - 06:58:06 PST |
RE: [SI-LIST] : What's your favorite Screwy SI Concept? | Alderete, Michael | Fri Jan 14 2000 - 07:01:10 PST |
RE: [SI-LIST] : XTK vs ICX | Chan, Michael | Fri Jan 14 2000 - 07:29:37 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Fri Jan 14 2000 - 08:53:12 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Fri Jan 14 2000 - 08:55:41 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Lee Ritchey | Fri Jan 14 2000 - 08:54:00 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Tom Dagostino | Fri Jan 14 2000 - 09:12:13 PST |
[SI-LIST] : Simulations | Doug Smith | Fri Jan 14 2000 - 09:30:05 PST |
[SI-LIST] : Signal integrity engineers | Ron Mosher | Fri Jan 14 2000 - 09:28:55 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Jian Zheng | Fri Jan 14 2000 - 09:58:54 PST |
RE: [SI-LIST] : XTK vs ICX | Dan Bostan | Fri Jan 14 2000 - 10:02:42 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Jeff Seeger | Fri Jan 14 2000 - 10:05:19 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | [email protected] | Fri Jan 14 2000 - 10:20:15 PST |
Re: [SI-LIST] : 20H Revisited | Michael Vrbanac | Fri Jan 14 2000 - 10:31:36 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Ron Miller | Fri Jan 14 2000 - 10:34:57 PST |
[SI-LIST] : Zo Variance From Plating Thickness Variation | Dave Hoover | Fri Jan 14 2000 - 10:48:32 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Jian Zheng | Fri Jan 14 2000 - 11:10:25 PST |
[SI-LIST] : Does anyone have a model for a Meritec PCI connector? | Tom Pelc | Fri Jan 14 2000 - 11:18:59 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | sweir | Fri Jan 14 2000 - 11:54:22 PST |
Re: [SI-LIST] : Simulations | Scott McMorrow | Fri Jan 14 2000 - 11:55:36 PST |
[SI-LIST] : What's your favourite Screwy SI Concept and right angle bends? | Hans Mellberg | Fri Jan 14 2000 - 12:20:11 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Adrian Shiner | Thu Jan 13 2000 - 11:12:59 PST |
Re: [SI-LIST] : Simulations | Michael Vrbanac | Fri Jan 14 2000 - 12:55:57 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Doug McKean | Fri Jan 14 2000 - 13:07:04 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Neven Pischl | Fri Jan 14 2000 - 13:26:20 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Fri Jan 14 2000 - 13:50:21 PST |
Re: [SI-LIST] : Simulations | Scott McMorrow | Fri Jan 14 2000 - 13:53:06 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Jim Freeman | Fri Jan 14 2000 - 14:15:05 PST |
[SI-LIST] : C and L measurements using a TDR | Richard A. Schumacher | Fri Jan 14 2000 - 14:48:17 PST |
RE: [SI-LIST] : Zo Variance From Plating Thickness Variation | Tom Dagostino | Fri Jan 14 2000 - 15:44:20 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Bruce W. Marler | Fri Jan 14 2000 - 16:06:26 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | [email protected] | Fri Jan 14 2000 - 16:08:10 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept and right angle bends? | [email protected] | Fri Jan 14 2000 - 16:09:53 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | ARNOLD,PETER (HP-Cupertino,ex3) | Fri Jan 14 2000 - 16:37:45 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Ron Miller | Fri Jan 14 2000 - 16:40:46 PST |
Re: [SI-LIST] : 20H Revisited | Sainath Nimmagadda | Fri Jan 14 2000 - 17:34:03 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? More on Bends/Miters | LATOURRETTE,JEFF (HP-SanJose,ex1) | Fri Jan 14 2000 - 18:11:29 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? More on Bends/Miters | Chris Cheng | Fri Jan 14 2000 - 19:36:11 PST |
Re: [SI-LIST] : 20H Revisited | Michael Vrbanac | Fri Jan 14 2000 - 20:35:45 PST |
Re: [SI-LIST] : 20H Revisited | [email protected] | Fri Jan 14 2000 - 21:14:12 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Bruce W. Marler | Sat Jan 15 2000 - 09:47:35 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Sat Jan 15 2000 - 12:13:46 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Sat Jan 15 2000 - 12:15:54 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Lee Ritchey | Sat Jan 15 2000 - 12:18:11 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Scott McMorrow | Sat Jan 15 2000 - 12:33:43 PST |
Re: [SI-LIST] : What's your favourite Screwy SI Concept? | Scott McMorrow | Sat Jan 15 2000 - 12:36:30 PST |
[SI-LIST] : width of the return path | Eric Bogatin | Sun Jan 16 2000 - 08:16:54 PST |
Re: [SI-LIST] : width of the return path | Nirmal Jain | Sun Jan 16 2000 - 11:38:15 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Adrian Shiner | Sun Jan 16 2000 - 10:55:02 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Adrian Shiner | Sun Jan 16 2000 - 10:48:23 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | [email protected] | Sun Jan 16 2000 - 16:21:22 PST |
Re: [SI-LIST] : What's your favorite Screwy SI Concept? | Michael Vrbanac | Sun Jan 16 2000 - 17:26:35 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | Chris Heard | Sun Jan 16 2000 - 17:37:22 PST |
RE: [SI-LIST] : Simulations | Abe Riazi | Sun Jan 16 2000 - 18:46:04 PST |
RE: [SI-LIST] : width of the return path | Teddy Chou | Sun Jan 16 2000 - 19:18:30 PST |
[SI-LIST] : Excessive Posting Length | add automation | Sun Jan 16 2000 - 19:59:00 PST |
Re: [SI-LIST] : Simulations | Douglas C. Smith | Sun Jan 16 2000 - 23:05:45 PST |
RE: [SI-LIST] : What's your favourite Screwy SI Concept? | [email protected] | Mon Jan 17 2000 - 07:33:02 PST |
Re: [SI-LIST] : High Speed Backplane Connector Recommendations | Bruce W. Marler | Mon Jan 17 2000 - 07:45:56 PST |
RE: [SI-LIST] : XTK vs ICX | Weston Beal | Mon Jan 17 2000 - 08:46:24 PST |
Re: [SI-LIST] : Excessive Posting Length | Patrick Lawler | Mon Jan 17 2000 - 08:51:17 PST |
[SI-LIST] : receiver jitter | Chris Cheng | Mon Jan 17 2000 - 16:51:26 PST |
[SI-LIST] : [Fwd: TDNACal access] | Ron Miller | Mon Jan 17 2000 - 17:19:58 PST |
RE: [SI-LIST] : receiver jitter | Marc Humphreys | Tue Jan 18 2000 - 06:50:02 PST |
RE: [SI-LIST] : receiver jitter | Muranyi, Arpad | Tue Jan 18 2000 - 08:23:07 PST |
[SI-LIST] : minor si-list problem resolved | Ray Anderson | Tue Jan 18 2000 - 14:45:45 PST |
RE: [SI-LIST] : receiver jitter | Roy Leventhal | Tue Jan 18 2000 - 15:02:54 PST |
Re: [SI-LIST] : receiver jitter | Jonathan Dowling | Tue Jan 18 2000 - 17:57:18 PST |
[SI-LIST] : BERT testers | zanella, fabrizio | Wed Jan 19 2000 - 04:58:28 PST |
RE: [SI-LIST] : minor si-list problem resolved | Muranyi, Arpad | Wed Jan 19 2000 - 08:43:42 PST |
Re: [SI-LIST] : BERT testers | Bruce W. Marler | Wed Jan 19 2000 - 08:44:41 PST |
Re: [SI-LIST] : XTK vs ICX | Tadashi ARAI | Wed Jan 19 2000 - 10:10:28 PST |
RE: [SI-LIST] : receiver jitter | Chris cheng | Wed Jan 19 2000 - 10:12:11 PST |
Re: [SI-LIST] : XTK vs ICX | Scott McMorrow | Wed Jan 19 2000 - 10:28:35 PST |
RE: [SI-LIST] : receiver jitter | Jonathan Dowling | Wed Jan 19 2000 - 10:26:47 PST |
Re: [SI-LIST] : BERT testers | Doug McKean | Wed Jan 19 2000 - 10:47:54 PST |
Re: [SI-LIST] : receiver jitter | Scott McMorrow | Wed Jan 19 2000 - 10:50:04 PST |
RE: [SI-LIST] : receiver jitter | ARNOLD,PETER (HP-Cupertino,ex3) | Wed Jan 19 2000 - 11:21:27 PST |
RE: [SI-LIST] : receiver jitter | Chan, Michael | Wed Jan 19 2000 - 11:24:54 PST |
Re: [SI-LIST] : receiver jitter | D. C. Sessions | Wed Jan 19 2000 - 11:44:11 PST |
RE: [SI-LIST] : receiver jitter | Tom Dagostino | Wed Jan 19 2000 - 11:43:05 PST |
[SI-LIST] : New Experimental si-list-digest service | Ray Anderson | Wed Jan 19 2000 - 11:46:17 PST |
Re: [SI-LIST] : receiver jitter | D. C. Sessions | Wed Jan 19 2000 - 11:52:24 PST |
Re: [SI-LIST] : receiver jitter | D. C. Sessions | Wed Jan 19 2000 - 11:57:14 PST |
Re: [SI-LIST] : receiver jitter | Jim Freeman | Wed Jan 19 2000 - 12:00:35 PST |
RE: [SI-LIST] : receiver jitter | Chris Cheng | Wed Jan 19 2000 - 12:55:29 PST |
RE: [SI-LIST] : XTK vs ICX | James F. Peterson | Wed Jan 19 2000 - 13:08:52 PST |
RE: [SI-LIST] : receiver jitter | Mellitz, Richard | Wed Jan 19 2000 - 13:17:45 PST |
RE: [SI-LIST] : receiver jitter | Chris Cheng | Wed Jan 19 2000 - 13:28:53 PST |
RE: [SI-LIST] : receiver jitter | Chan, Michael | Wed Jan 19 2000 - 13:31:49 PST |
Re: [SI-LIST] : receiver jitter | Jim Freeman | Wed Jan 19 2000 - 14:37:48 PST |
Re: [SI-LIST] : receiver jitter | bgrossma | Wed Jan 19 2000 - 15:14:27 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Dmitri Kuznetsov | Wed Jan 19 2000 - 15:59:34 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Mellitz, Richard | Wed Jan 19 2000 - 16:26:14 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Fred Balistreri | Wed Jan 19 2000 - 16:20:14 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Kim Helliwell | Wed Jan 19 2000 - 17:05:45 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Kim Helliwell | Wed Jan 19 2000 - 17:13:06 PST |
RE: [SI-LIST] : XTK vs ICX | �L�·� | Wed Jan 19 2000 - 17:37:03 PST |
RE: [SI-LIST] : receiver jitter | Chris Cheng | Wed Jan 19 2000 - 18:04:47 PST |
[SI-LIST] : differential trace model (was: receiver jitter) | [email protected] | Wed Jan 19 2000 - 20:45:08 PST |
Re: [SI-LIST] : receiver jitter | Mike LaBonte | Thu Jan 20 2000 - 05:55:19 PST |
RE: [SI-LIST] : **error**: internal timestep too small | zanella, fabrizio | Thu Jan 20 2000 - 06:14:01 PST |
Re: [SI-LIST] : BERT testers | [email protected] | Wed Jan 19 2000 - 11:45:04 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Muranyi, Arpad | Thu Jan 20 2000 - 08:54:39 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Kim Helliwell | Thu Jan 20 2000 - 10:15:51 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Muranyi, Arpad | Thu Jan 20 2000 - 12:18:42 PST |
Re: [SI-LIST] : receiver jitter | Adrian Shiner | Thu Jan 20 2000 - 11:37:11 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Zabinski, Patrick | Thu Jan 20 2000 - 12:46:45 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Kim Helliwell | Thu Jan 20 2000 - 13:03:26 PST |
RE: [SI-LIST] : **error**: internal timestep too small | [email protected] | Thu Jan 20 2000 - 13:04:33 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Stephen Peters | Thu Jan 20 2000 - 13:05:12 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Mellitz, Richard | Thu Jan 20 2000 - 13:38:05 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Kim Helliwell | Thu Jan 20 2000 - 13:41:00 PST |
[SI-LIST] : 10 layer board stackup | [email protected] | Thu Jan 20 2000 - 14:22:31 PST |
Re: [SI-LIST] : 10 layer board stackup | Ron Miller | Thu Jan 20 2000 - 14:43:13 PST |
RE: [SI-LIST] : modeling languages (was: receiver jitter) | Muranyi, Arpad | Thu Jan 20 2000 - 17:35:26 PST |
Re: [SI-LIST] : 10 layer board stackup | Lee Ritchey | Thu Jan 20 2000 - 17:48:48 PST |
RE: [SI-LIST] : 10 layer board stackup | Dunbar, Tony | Thu Jan 20 2000 - 18:06:57 PST |
RE: [SI-LIST] : 10 layer board stackup | Cusanelli, Tony | Fri Jan 21 2000 - 05:33:11 PST |
RE: [SI-LIST] : XTK vs ICX | zanella, fabrizio | Fri Jan 21 2000 - 05:29:46 PST |
Re: [SI-LIST] : **error**: internal timestep too small | [email protected] | Fri Jan 21 2000 - 06:59:33 PST |
RE: [SI-LIST] : 10 layer board stackup | Grasso, Charles (Chaz) | Fri Jan 21 2000 - 07:53:35 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Muranyi, Arpad | Fri Jan 21 2000 - 07:57:26 PST |
RE: [SI-LIST] : **error**: internal timestep too small | Chan, Michael | Fri Jan 21 2000 - 08:15:02 PST |
Re: [SI-LIST] : **error**: internal timestep too small | Kim Helliwell | Fri Jan 21 2000 - 08:38:42 PST |
RE: [SI-LIST] : 10 layer board stackup | [email protected] | Fri Jan 21 2000 - 08:48:58 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Jim Freeman | Fri Jan 21 2000 - 09:24:36 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | C. Kumar | Fri Jan 21 2000 - 10:32:42 PST |
RE: [SI-LIST] : 10 layer board stackup | Johns Daniel | Fri Jan 21 2000 - 10:48:24 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Kim Helliwell | Fri Jan 21 2000 - 11:03:49 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | C. Kumar | Fri Jan 21 2000 - 11:44:58 PST |
RE: [SI-LIST] : modeling languages (was: receiver jitter) | Muranyi, Arpad | Fri Jan 21 2000 - 11:59:36 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Jim Freeman | Fri Jan 21 2000 - 12:20:20 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | C. Kumar | Fri Jan 21 2000 - 12:40:33 PST |
RE: [SI-LIST] : modeling languages (was: receiver jitter) | Muranyi, Arpad | Fri Jan 21 2000 - 12:39:07 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Fred Balistreri | Fri Jan 21 2000 - 12:30:34 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Kim Helliwell | Fri Jan 21 2000 - 13:07:05 PST |
Re: [SI-LIST] : 10 layer board stackup | Doug McKean | Fri Jan 21 2000 - 13:36:42 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Fred Balistreri | Fri Jan 21 2000 - 13:35:26 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Jim Freeman | Fri Jan 21 2000 - 14:35:33 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Fred Balistreri | Fri Jan 21 2000 - 16:19:29 PST |
[SI-LIST] : Email slip up | Fred Balistreri | Fri Jan 21 2000 - 16:39:36 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Jim Freeman | Fri Jan 21 2000 - 17:39:23 PST |
[SI-LIST] : Distance between Power and Ground planes | david gil donate | Mon Jan 24 2000 - 01:57:49 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | D. C. Sessions | Mon Jan 24 2000 - 07:43:39 PST |
Re: [SI-LIST] : Distance between Power and Ground planes | Lee Ritchey | Mon Jan 24 2000 - 07:57:46 PST |
RE: [SI-LIST] : Distance between Power and Ground planes | Clewell, Craig W | Mon Jan 24 2000 - 10:00:52 PST |
Re: [SI-LIST] : Distance between Power and Ground planes | Doug McKean | Mon Jan 24 2000 - 11:22:53 PST |
RE: [SI-LIST] : modeling languages (was: receiver jitter) | Chris Cheng | Mon Jan 24 2000 - 14:02:33 PST |
Re: [SI-LIST] : modeling languages (was: receiver jitter) | Fred Balistreri | Mon Jan 24 2000 - 14:29:29 PST |
[SI-LIST] : Field Extractor + Simulator | Christian S. Rode | Tue Jan 25 2000 - 15:10:04 PST |
[SI-LIST] : Re: Field Extractor + Simulator | Christian S. Rode | Tue Jan 25 2000 - 16:14:42 PST |
[SI-LIST] : Decoupling capacitor resonance | Chris Bobek | Tue Jan 25 2000 - 17:42:02 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Ron Miller | Tue Jan 25 2000 - 18:10:12 PST |
RE: [SI-LIST] : IDE bus question | Farrokh Mottahedin | Tue Jan 25 2000 - 11:54:36 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | David Instone | Wed Jan 26 2000 - 02:11:41 PST |
[SI-LIST] :PECL spec? | Ronnen Lovinger | Wed Jan 26 2000 - 02:33:50 PST |
RE: [SI-LIST] :PECL spec? | Zabinski, Patrick | Wed Jan 26 2000 - 04:44:34 PST |
RE: [SI-LIST] : Decoupling capacitor resonance | Peterson, James F (FL51) | Wed Jan 26 2000 - 05:38:20 PST |
RE: [SI-LIST] : Decoupling capacitor resonance | Greim, Michael | Wed Jan 26 2000 - 06:11:32 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Roy Leventhal | Wed Jan 26 2000 - 07:29:40 PST |
[SI-LIST] : Workshop on Signal Propagation on Interconnects | SPI Workshop | Wed Jan 26 2000 - 07:51:26 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Ray Anderson | Wed Jan 26 2000 - 10:27:49 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Ron Miller | Wed Jan 26 2000 - 10:56:26 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Chris Bobek | Wed Jan 26 2000 - 11:42:36 PST |
RE: [SI-LIST] : Decoupling capacitor resonance | Chris Cheng | Wed Jan 26 2000 - 11:58:01 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Roy Leventhal | Wed Jan 26 2000 - 12:00:18 PST |
Re: [SI-LIST] : Frequency dependence and all that jazz | Arani Sinha | Wed Jan 26 2000 - 12:02:03 PST |
[SI-LIST] : PCB layout in pull up/down resistors | Marko Pulli | Wed Jan 26 2000 - 12:10:49 PST |
[SI-LIST] : Another capacitor question | Brent DeWitt | Wed Jan 26 2000 - 13:03:42 PST |
Re: [SI-LIST] : Another capacitor question | Ray Anderson | Wed Jan 26 2000 - 13:28:50 PST |
[SI-LIST] : Job Opening- Intel Oregon | Gardiner, Scott | Wed Jan 26 2000 - 17:37:34 PST |
Re: [SI-LIST] : Decoupling capacitor resonance | Ray Anderson | Wed Jan 12 2000 - 05:59:50 PST |
Re: [SI-LIST] : Another capacitor question | David Instone | Thu Jan 27 2000 - 01:51:20 PST |
RE: [SI-LIST] : Another capacitor question | Dan Swanson | Thu Jan 27 2000 - 04:38:53 PST |
Re: [SI-LIST] : Another capacitor question | Ron Miller | Thu Jan 27 2000 - 09:57:56 PST |
Re: [SI-LIST] : Another capacitor question | Ray Anderson | Thu Jan 27 2000 - 10:33:32 PST |
Re: [SI-LIST] : Another capacitor question | Doug Brooks | Thu Jan 27 2000 - 11:17:23 PST |
[SI-LIST] : Power Plane for Internal Device Power? | phelan, tony | Thu Jan 27 2000 - 11:35:46 PST |
Re: [SI-LIST] : Another capacitor question | Ray Anderson | Thu Jan 27 2000 - 11:46:48 PST |
RE: [SI-LIST] : Another capacitor question | Dan Swanson | Thu Jan 27 2000 - 11:56:40 PST |
Re: [SI-LIST] : Power Plane for Internal Device Power? | Scott McMorrow | Thu Jan 27 2000 - 12:03:47 PST |
Re: [SI-LIST] : Another capacitor question | Mark Randol | Thu Jan 27 2000 - 12:10:29 PST |
Re: [SI-LIST] : Power Plane for Internal Device Power? | D. C. Sessions | Thu Jan 27 2000 - 12:18:52 PST |
Re: [SI-LIST] : Power Plane for Internal Device Power? | Bradley S Henson | Thu Jan 27 2000 - 12:56:22 PST |
Re: [SI-LIST] : Power Plane for Internal Device Power? | Lee Ritchey | Thu Jan 27 2000 - 14:16:10 PST |
Re: [SI-LIST] : Power Plane for Internal Device Power? | D. C. Sessions | Thu Jan 27 2000 - 14:29:06 PST |
[SI-LIST] : Questions abt Power Distribution System | Chang, Isaac Yew Beng | Thu Jan 27 2000 - 23:50:26 PST |
RE: [SI-LIST] : Power Plane for Internal Device Power? | Peterson, James F (FL51) | Fri Jan 28 2000 - 04:19:58 PST |
Re: [SI-LIST] : Questions abt Power Distribution System | Istvan NOVAK | Fri Jan 28 2000 - 04:06:29 PST |
Re: [SI-LIST] : Questions abt Power Distribution System | Ray Anderson | Fri Jan 28 2000 - 10:41:14 PST |
[SI-LIST] : EUROPEAN IBIS SUMMIT MEETING ANNOUNCEMENT | Bob Ross | Fri Jan 28 2000 - 13:09:02 PST |
[SI-LIST] : Announcement and Call for Papers (EPEP '00) | Ray Anderson | Fri Jan 28 2000 - 15:13:28 PST |
[SI-LIST] : Looking for shielded Din 41612 compatible connector | Greim, Michael | Tue Feb 01 2000 - 07:43:35 PST |
[SI-LIST] : LVDS questions | Tom Zimmerman | Tue Feb 01 2000 - 12:13:01 PST |
Re: [SI-LIST] : LVDS questions | D. C. Sessions | Tue Feb 01 2000 - 12:39:18 PST |
[SI-LIST] : Signal Integrity simulation tools | Roberts, Chris | Wed Feb 02 2000 - 05:34:06 PST |
[SI-LIST] : How to find the archives (was Re: Signal Integrity simulation tools) | Laurence Michaels | Wed Feb 02 2000 - 08:02:48 PST |
Re: [SI-LIST] : LVDS questions | Tom Zimmerman | Wed Feb 02 2000 - 08:57:27 PST |
RE: [SI-LIST] : LVDS questions | Stephen Peters | Wed Feb 02 2000 - 09:59:56 PST |
[SI-LIST] : LVDS signal observation | Christopher wilson | Wed Feb 02 2000 - 10:05:33 PST |
FW: [SI-LIST] : Looking for shielded Din 41612 compatible connector | [email protected] | Wed Feb 02 2000 - 09:43:23 PST |
RE: [SI-LIST] : LVDS signal observation | Tom Dagostino | Wed Feb 02 2000 - 10:38:52 PST |
Re: [SI-LIST] : LVDS signal observation | Bradley S Henson | Wed Feb 02 2000 - 10:51:28 PST |
RE: [SI-LIST] : LVDS signal observation | Degerstrom, Michael J. | Wed Feb 02 2000 - 11:55:45 PST |
Re: [SI-LIST] : LVDS signal observation | Bruce W. Marler | Wed Feb 02 2000 - 12:25:21 PST |
RE: [SI-LIST] : LVDS questions | Degerstrom, Michael J. | Wed Feb 02 2000 - 12:44:52 PST |
[SI-LIST] : SI Speaker Feedback | Kevin Hansen | Wed Feb 02 2000 - 12:54:03 PST |
Re: [SI-LIST] : LVDS signal observation | [email protected] | Wed Feb 02 2000 - 12:52:24 PST |
[SI-LIST] : 20H rule: a theory? | Abd ul-Rahman Lomax | Wed Feb 02 2000 - 13:27:35 PST |
[SI-LIST] : si-list FAQ | Ray Anderson | Wed Feb 02 2000 - 13:25:55 PST |
RE: [SI-LIST] : LVDS signal observation | [email protected] | Wed Feb 02 2000 - 13:39:33 PST |
Re: [SI-LIST] : si-list FAQ | Sainath Nimmagadda | Wed Feb 02 2000 - 14:06:35 PST |
RE: [SI-LIST] : si-list FAQ | Won Chang | Wed Feb 02 2000 - 14:21:47 PST |
RE: [SI-LIST] : si-list FAQ | Weston Beal | Wed Feb 02 2000 - 15:30:07 PST |
[SI-LIST] : SSN and Power Plane Bounce, 8th February Presentation | Hans Mellberg | Wed Feb 02 2000 - 17:14:10 PST |
[SI-LIST] : environment effects of radiofrequency radiation | Wang Lin | Wed Feb 02 2000 - 19:03:49 PST |
Re: [SI-LIST] : LVDS signal observation | greg kimball | Wed Feb 02 2000 - 21:03:22 PST |
RE: [SI-LIST] : 20H rule: a theory? | Jeremy Plunkett | Wed Jan 12 2000 - 12:24:15 PST |
[SI-LIST] : Possible FAQ Topics | Ray Anderson | Wed Jan 12 2000 - 13:16:32 PST |
R:[SI-LIST] : LVDS signal observation | Vigliarolo Roberto | Thu Feb 03 2000 - 01:11:49 PST |
Re: [SI-LIST] : SSN and Power Plane Bounce, 8th February Presentation | Lee Ritchey | Thu Feb 03 2000 - 09:02:46 PST |
RE: [SI-LIST] : environment effects of radiofrequency radiation | Ingraham, Andrew | Thu Feb 03 2000 - 09:16:14 PST |
RE: [SI-LIST] : Possible FAQ Topics | Farrokh Mottahedin | Thu Feb 03 2000 - 09:20:39 PST |
[SI-LIST] : High-Speed Materials {[DC] & SI-List} | Alderete, Michael | Thu Feb 03 2000 - 09:49:24 PST |
RE: [SI-LIST] : High-Speed Materials {[DC] & SI-List} | Zabinski, Patrick J. | Thu Feb 03 2000 - 10:16:16 PST |
Re: [SI-LIST] : Possible FAQ Topics | Mike Mayer | Thu Feb 03 2000 - 10:49:26 PST |
Re: [SI-LIST] : Possible FAQ Topics | [email protected] | Thu Feb 03 2000 - 11:10:36 PST |
[SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Thu Feb 03 2000 - 10:58:26 PST |
[SI-LIST] : Info about Xilinx Xchecker Cables | Jagdeep Singh | Thu Feb 03 2000 - 11:06:45 PST |
Re: [SI-LIST] : High-Speed Materials {[DC] & SI-List} | [email protected] | Thu Feb 03 2000 - 11:07:44 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Dan Swanson | Thu Feb 03 2000 - 11:28:02 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Ray Anderson | Thu Feb 03 2000 - 11:34:49 PST |
Re: [SI-LIST] : High-Speed Materials {[DC] & SI-List} | E Montgomery | Thu Feb 03 2000 - 11:40:01 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Zabinski, Patrick J. | Thu Feb 03 2000 - 11:43:47 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Thu Feb 03 2000 - 11:49:43 PST |
[SI-LIST] : interplanar capacitance | Speer, Ewart | Thu Feb 03 2000 - 11:48:46 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Thu Feb 03 2000 - 11:55:31 PST |
RE: [SI-LIST] : Info about Xilinx Xchecker Cables | Patterson, Ken | Thu Feb 03 2000 - 12:12:27 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Vinu Arumugham | Thu Feb 03 2000 - 12:11:54 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Alfredo Moncayo | Thu Feb 03 2000 - 12:22:45 PST |
Re: [SI-LIST] : interplanar capacitance | Ray Anderson | Thu Feb 03 2000 - 12:27:36 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Thu Feb 03 2000 - 12:38:48 PST |
Re: [SI-LIST] : interplanar capacitance | sweir | Thu Feb 03 2000 - 12:49:25 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Zabinski, Patrick J. | Thu Feb 03 2000 - 12:49:20 PST |
RE: [SI-LIST] : interplanar capacitance | Greim, Michael | Thu Feb 03 2000 - 12:56:49 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Ray Anderson | Thu Feb 03 2000 - 12:52:23 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Daniel, Erik S. | Thu Feb 03 2000 - 13:02:08 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Ray Anderson | Thu Feb 03 2000 - 13:05:06 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Vinu Arumugham | Thu Feb 03 2000 - 13:39:52 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Thu Feb 03 2000 - 14:20:11 PST |
[SI-LIST] : Embedded Capacitance Workshop a reminder | Grasso, Charles (Chaz) | Thu Feb 03 2000 - 15:26:02 PST |
RE: [SI-LIST] : Coplanar Transmission Line | WAUGH,RAY (HP-SanJose,ex1) | Thu Feb 03 2000 - 15:33:42 PST |
[SI-LIST] : ESR and bypass caps | Doug Brooks | Thu Feb 03 2000 - 15:38:06 PST |
Re: [SI-LIST] : Coplanar Transmission Line | John Howard | Thu Feb 03 2000 - 08:52:42 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Thu Feb 03 2000 - 17:19:56 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Ron Miller | Thu Feb 03 2000 - 17:51:53 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Ron Miller | Thu Feb 03 2000 - 18:01:33 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Scott McMorrow | Thu Feb 03 2000 - 18:22:22 PST |
RE: [SI-LIST] : Coplanar Transmission Line | [email protected] | Thu Feb 03 2000 - 18:24:34 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Chris Padilla | Thu Feb 03 2000 - 18:26:57 PST |
Re: [SI-LIST] : Coplanar Transmission Line | [email protected] | Thu Feb 03 2000 - 20:34:32 PST |
[SI-LIST] : EMC techniques on 2-layer board | Wang Lin | Thu Feb 03 2000 - 21:33:55 PST |
RE: [SI-LIST] : High-Speed Materials {[DC] & SI-List} | John Phillips | Fri Feb 04 2000 - 01:51:19 PST |
[SI-LIST] : Crossing clock domain boundaries in digital ASICs | [email protected] | Fri Feb 04 2000 - 02:13:01 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Fri Feb 04 2000 - 06:03:06 PST |
RE: [SI-LIST] : interplanar capacitance | Harris, George | Thu Feb 03 2000 - 14:17:53 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Fri Feb 04 2000 - 07:11:41 PST |
[SI-LIST] : Low EMI on Two layers | Fred Dieckmann | Fri Feb 04 2000 - 07:21:45 PST |
Re: [SI-LIST] : EMC techniques on 2-layer board | John Howard | Fri Feb 04 2000 - 00:10:05 PST |
Re: [SI-LIST] : EMC techniques on 2-layer board | [email protected] | Fri Feb 04 2000 - 08:06:51 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Fri Feb 04 2000 - 08:20:46 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Fri Feb 04 2000 - 08:29:59 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Fri Feb 04 2000 - 08:40:07 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Fri Feb 04 2000 - 08:43:05 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Fri Feb 04 2000 - 09:05:45 PST |
RE: [SI-LIST] : Coplanar Transmission Line | E Montgomery | Fri Feb 04 2000 - 09:41:16 PST |
[SI-LIST] : Gigabit eithernet board. | Nick Dietz | Fri Feb 04 2000 - 09:47:55 PST |
[SI-LIST] : Oooops.... | Ray Anderson | Fri Feb 04 2000 - 09:54:52 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Jian Zheng | Fri Feb 04 2000 - 10:11:52 PST |
Re: [SI-LIST] : ESR and bypass caps | Larry Smith | Fri Feb 04 2000 - 11:06:37 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Roy Leventhal | Fri Feb 04 2000 - 10:24:25 PST |
Re: [SI-LIST] : ESR and bypass caps | Ron Miller | Fri Feb 04 2000 - 11:43:31 PST |
Re: [SI-LIST] : ESR and bypass caps | Doug Brooks | Fri Feb 04 2000 - 11:52:55 PST |
[SI-LIST] : RE:High-Speed Materials | Hans Mellberg | Fri Feb 04 2000 - 12:28:35 PST |
Re: [SI-LIST] : ESR and bypass caps | Ray Anderson | Fri Feb 04 2000 - 12:40:05 PST |
[SI-LIST] : Power noise/ground bounce software | zanella, fabrizio | Fri Feb 04 2000 - 12:37:52 PST |
RE: [SI-LIST] : RE:High-Speed Materials | Farrokh Mottahedin | Fri Feb 04 2000 - 13:04:53 PST |
Re: [SI-LIST] : Power noise/ground bounce software | Ron Miller | Fri Feb 04 2000 - 13:18:38 PST |
Re: [SI-LIST] : ESR and bypass caps | Ray Anderson | Fri Feb 04 2000 - 13:28:44 PST |
RE: [SI-LIST] : modeling languages (was: receiver jitter) | Muranyi, Arpad | Fri Feb 04 2000 - 13:24:38 PST |
RE: [SI-LIST] : Power noise/ground bounce software | Chan, Michael | Fri Feb 04 2000 - 13:45:31 PST |
RE: [SI-LIST] : Power noise/ground bounce software | [email protected] | Fri Feb 04 2000 - 14:14:48 PST |
[SI-LIST] : Request for AMP Materials Paper | DAmbrosia, John F | Fri Feb 04 2000 - 14:20:47 PST |
Re: [SI-LIST] : ESR and bypass caps | Larry Smith | Fri Feb 04 2000 - 15:37:18 PST |
Re: [SI-LIST] : ESR and bypass caps | Richard A. Schumacher | Fri Feb 04 2000 - 15:43:03 PST |
Re: [SI-LIST] : ESR and bypass caps | Doug Brooks | Fri Feb 04 2000 - 16:06:17 PST |
Re: [SI-LIST] : Coplanar Transmission Line | Mark Randol | Fri Feb 04 2000 - 16:39:08 PST |
RE: [SI-LIST] : Power noise/ground bounce software | Winson Yu | Fri Feb 04 2000 - 17:12:29 PST |
Re: [SI-LIST] : ESR and bypass caps | Doug Brooks | Fri Feb 04 2000 - 18:17:34 PST |
Re: [SI-LIST] : ESR and bypass caps | Douglas C. Smith | Fri Feb 04 2000 - 18:45:48 PST |
Re: [SI-LIST] : ESR and bypass caps | Douglas C. Smith | Fri Feb 04 2000 - 18:53:32 PST |
Re: [SI-LIST] : ESR and bypass caps | Douglas C. Smith | Sat Feb 05 2000 - 06:15:57 PST |
Re: [SI-LIST] : ESR and bypass caps | Ray Anderson | Wed Jan 12 2000 - 15:54:46 PST |
Re: [SI-LIST] : ESR and bypass caps | Douglas C. Smith | Sun Feb 06 2000 - 18:53:49 PST |
[SI-LIST] : DesignCon20000 paper posted | Istvan NOVAK | Sun Feb 06 2000 - 20:53:59 PST |
Re: [SI-LIST] : ESR and bypass caps | Istvan NOVAK | Sun Feb 06 2000 - 21:16:05 PST |
RE: [SI-LIST] : 10 layer board stackup Revisited | Gary Steinkogler | Sun Feb 06 2000 - 21:27:19 PST |
Re: [SI-LIST] : ESR and bypass caps | Scott McMorrow | Sun Feb 06 2000 - 22:15:43 PST |
[SI-LIST] : DSO Selection | [email protected] | Sun Feb 06 2000 - 23:50:58 PST |
Re: [SI-LIST] : ESR and bypass caps | [email protected] | Mon Feb 07 2000 - 06:22:07 PST |
Re: [SI-LIST] : DesignCon20000 paper posted | Roy Leventhal | Mon Feb 07 2000 - 06:27:38 PST |
RE: [SI-LIST] : ESR and bypass caps | John Phillips | Mon Feb 07 2000 - 06:53:30 PST |
Re: [SI-LIST] : ESR and bypass caps | Larry Smith | Mon Feb 07 2000 - 09:39:10 PST |
Re: [SI-LIST] : ESR and bypass caps | Larry Smith | Mon Feb 07 2000 - 10:21:52 PST |
Re: [SI-LIST] : DesignCon20000 paper posted | Jim Freeman | Mon Feb 07 2000 - 11:04:13 PST |
Re: [SI-LIST] : DesignCon20000 paper posted | Scott McMorrow | Mon Feb 07 2000 - 11:19:07 PST |
Re: [SI-LIST] : ESR and bypass caps | Istvan Novak - Board Design Technology | Mon Feb 07 2000 - 11:46:53 PST |
Re: [SI-LIST] : ESR and bypass caps | Doug Brooks | Mon Feb 07 2000 - 12:02:51 PST |
Re: [SI-LIST] : DSO Selection | Ron Miller | Mon Feb 07 2000 - 12:00:41 PST |
Re: [SI-LIST] : Gigabit eithernet board. | Dennis Tomlinson | Mon Feb 07 2000 - 12:31:49 PST |
Re: [SI-LIST] : ESR and bypass caps | Ray Anderson | Mon Feb 07 2000 - 16:58:17 PST |
RE: [SI-LIST] : Coplanar Transmission Line | Shawn Carpenter | Mon Feb 07 2000 - 20:16:55 PST |
[SI-LIST] : correction | Douglas C. Smith | Mon Feb 07 2000 - 22:38:59 PST |
[SI-LIST] : Training Suggestions Wanted | Mayer, Mike | Tue Feb 08 2000 - 05:51:45 PST |
Re: [SI-LIST] : Signal traces without reference plane | Heiko Dudek | Tue Feb 08 2000 - 07:35:36 PST |
RE: [SI-LIST] : RE:High-Speed Materials | Hans Mellberg | Tue Feb 08 2000 - 09:25:13 PST |
Re: [SI-LIST] : Training Suggestions Wanted | Laurence Michaels | Tue Feb 08 2000 - 10:03:51 PST |
Re: [SI-LIST] : LVDS signal observation | Doug Smith | Tue Feb 08 2000 - 10:25:24 PST |
RE: [SI-LIST] : Training Suggestions Wanted | Dunbar, Tony | Tue Feb 08 2000 - 10:22:56 PST |
[SI-LIST] : Re:Training Suggestions Wanted | Mackillop, William J. | Tue Feb 08 2000 - 11:46:57 PST |
RE: [SI-LIST] : DSO Selection | [email protected] | Tue Feb 08 2000 - 19:56:15 PST |
Re: [SI-LIST] : Re:Training Suggestions Wanted | Laurence Michaels | Wed Feb 09 2000 - 06:00:38 PST |
Re: [SI-LIST] : LVDS signal observation | Bradley S Henson | Wed Feb 09 2000 - 07:13:27 PST |
Re: [SI-LIST] : 10 layer board stackup Revisited | Lee Ritchey | Wed Feb 09 2000 - 08:14:36 PST |
Re: [SI-LIST] : 10 layer board stackup Revisited | Scott McMorrow | Wed Feb 09 2000 - 08:42:28 PST |
RE: [SI-LIST] : DSO Selection | Tom Dagostino | Wed Feb 09 2000 - 14:02:54 PST |
[SI-LIST] : LVDS signal observation | Christopher B Wilson | Wed Feb 09 2000 - 17:50:38 PST |
[SI-LIST] : bandwidth saving question | Matt Kaufmann | Thu Feb 10 2000 - 14:42:51 PST |
[SI-LIST] : si-list subscriber demographics | Ray Anderson | Thu Feb 10 2000 - 14:48:40 PST |
Re: [SI-LIST] : si-list subscriber demographics | Chris Padilla | Thu Feb 10 2000 - 16:50:21 PST |
RE: [SI-LIST] : Training Suggestions Wanted | Chris Cheng | Thu Feb 10 2000 - 17:10:09 PST |
[SI-LIST] : Anyone on SI-list receiving UCE type spam? | Peters, Stephen | Thu Feb 10 2000 - 17:28:25 PST |
Re: [SI-LIST] : Training Suggestions Wanted | John Howard | Thu Feb 10 2000 - 11:05:40 PST |
[SI-LIST] : Capacitor Characterization Vendor | Chang, Isaac Yew Beng | Thu Feb 10 2000 - 19:58:56 PST |
Re: [SI-LIST] : Training Suggestions Wanted | [email protected] | Thu Feb 10 2000 - 21:52:01 PST |
[SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputs | Netzler Dirk | Thu Feb 10 2000 - 23:01:47 PST |
RE: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-ad ress inputs | �L�·� | Fri Feb 11 2000 - 00:21:51 PST |
[SI-LIST] : Looking for ibis reflector subscribing info...... | Greim, Michael | Fri Feb 11 2000 - 04:44:47 PST |
RE: [SI-LIST] : bandwidth saving question | Clewell, Craig W | Fri Feb 11 2000 - 05:33:19 PST |
Re: [SI-LIST] : Looking for ibis reflector subscribing info...... | Sunil Kumar | Fri Feb 11 2000 - 05:59:40 PST |
RE: [SI-LIST] : Anyone on SI-list receiving UCE type spam? | Lund, Steve | Fri Feb 11 2000 - 05:53:00 PST |
RE: [SI-LIST] : Anyone on SI-list receiving UCE type spam? | Mayer, Mike | Fri Feb 11 2000 - 06:14:31 PST |
[SI-LIST] : 3D data interchange | Witte, Markus | Fri Feb 11 2000 - 07:17:13 PST |
Re: [SI-LIST] : Training Suggestions Wanted | Lee Ritchey | Fri Feb 11 2000 - 08:10:37 PST |
Re: [SI-LIST] : Capacitor Characterization Vendor | Jose Rodriguez | Fri Feb 11 2000 - 09:50:54 PST |
Re: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputs | Vinu Arumugham | Fri Feb 11 2000 - 10:12:18 PST |
Re: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputs | Scott McMorrow | Sat Feb 12 2000 - 01:08:35 PST |
[SI-LIST] : High Density Board to Board Connectors? | Doug Piper | Mon Feb 14 2000 - 06:54:19 PST |
RE: [SI-LIST] : High Density Board to Board Connectors? | Clewell, Craig W | Mon Feb 14 2000 - 07:20:09 PST |
RE: [SI-LIST] : High Density Board to Board Connectors? | Zabinski, Patrick J. | Mon Feb 14 2000 - 07:40:11 PST |
RE: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-a dress inputs | Peterson, James F (FL51) | Mon Feb 14 2000 - 08:11:03 PST |
RE: [SI-LIST] : High Density Board to Board Connectors? | Clewell, Craig W | Mon Feb 14 2000 - 08:15:35 PST |
Re: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-adress inputs | Scott McMorrow | Mon Feb 14 2000 - 08:48:39 PST |
Re: [SI-LIST] : High Density Board to Board Connectors? | [email protected] | Mon Feb 14 2000 - 08:55:37 PST |
Re: [SI-LIST] : montonic signals at SDRAM-, SSRAM- and FEPROM-adress inputs | D. C. Sessions | Mon Feb 14 2000 - 09:42:21 PST |
RE: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-a dress inputs | Ingraham, Andrew | Mon Feb 14 2000 - 11:05:07 PST |
[SI-LIST] :What do inputs do? monotonic signals at SDRAM-, SSRAM - and FEPROM-a dress inputs | Mellitz, Richard | Mon Feb 14 2000 - 19:45:21 PST |
[SI-LIST] : PADS PowerPCB + SPECCTRA FST Circuit Fire Sale | Kevin Daily | Tue Feb 15 2000 - 12:02:03 PST |
RE: [SI-LIST] : monotonic signals at SDRAM-, SSRAM- and FEPROM-a dress inputs | Peterson, James F (FL51) | Wed Feb 16 2000 - 12:44:39 PST |
RE: [SI-LIST] : ESR and bypass caps | [email protected] | Wed Feb 16 2000 - 13:57:42 PST |
RE: [SI-LIST] : ESR and bypass caps | Ray Anderson | Wed Feb 16 2000 - 14:52:24 PST |
[SI-LIST] : IBIS EUROPEAN SUMMIT MEETING SECOND ANNOUNCEMENT | Bob Ross | Wed Feb 16 2000 - 16:16:45 PST |
[SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Greim, Michael | Thu Feb 17 2000 - 11:35:41 PST |
Re: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Scott McMorrow | Thu Feb 17 2000 - 11:53:43 PST |
[SI-LIST] : CAD for SI, EMC. Hyperlynx experiences. | Jose Rodriguez | Thu Feb 17 2000 - 12:17:18 PST |
Re: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Ray Anderson | Thu Feb 17 2000 - 12:18:58 PST |
RE: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Mellitz, Richard | Thu Feb 17 2000 - 12:26:17 PST |
RE: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Zabinski, Patrick J. | Thu Feb 17 2000 - 12:45:06 PST |
Re: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Scott McMorrow | Thu Feb 17 2000 - 12:49:33 PST |
RE: [SI-LIST] : Creating and displaying eye diagrams with Avanti HSpice..... | Ray Anderson | Thu Feb 17 2000 - 13:25:10 PST |
RE: [SI-LIST] : CAD for SI, EMC. Hyperlynx experiences. | Mayer, Mike | Thu Feb 17 2000 - 13:35:27 PST |
RE: [SI-LIST] : CAD for SI, EMC. Hyperlynx experiences. | Chris Rokusek | Thu Feb 17 2000 - 14:51:55 PST |
[SI-LIST] : Position Available | Tim L. Michalka | Thu Feb 17 2000 - 15:07:11 PST |
[SI-LIST] : Where for art thou Tantalum Caps? | Chris Padilla | Thu Feb 17 2000 - 15:06:50 PST |
RE: [SI-LIST] : Where for art thou Tantalum Caps? | Scott Brenneman | Thu Feb 17 2000 - 15:45:15 PST |
[SI-LIST] : Other ways of transmitting differential signalling besides edge coupled traces or broad side coupled traces | Salvador Aguinaga | Thu Feb 17 2000 - 16:29:32 PST |
Re: [SI-LIST] : Other ways of transmitting differential signalling besides edgecoupled traces or broad side coupled traces | Bob Lewandowski | Thu Feb 17 2000 - 18:56:47 PST |
Re: [SI-LIST] : Where for art thou Tantalum Caps? | [email protected] | Thu Feb 17 2000 - 20:20:31 PST |
RE: [SI-LIST] : Where for art thou Tantalum Caps? | Cruz, Jose | Thu Feb 17 2000 - 17:31:31 PST |
[SI-LIST] : Power / Ground simulation | �L�·� | Thu Feb 17 2000 - 21:16:26 PST |
[SI-LIST] : problem with crystal | yaserh | Thu Feb 17 2000 - 23:21:00 PST |
�ظ�: [SI-LIST] : Power / Ground simulation | rachild.chen | Fri Feb 18 2000 - 00:24:31 PST |
Re: [SI-LIST] : problem with crystal | sweir | Fri Feb 18 2000 - 02:08:52 PST |
Re: [SI-LIST] : Other ways of transmitting differential signalling besides edgecoupled traces or broad side coupled traces | [email protected] | Fri Feb 18 2000 - 06:30:53 PST |
RE: [SI-LIST] : Power / Ground simulation | Ingraham, Andrew | Fri Feb 18 2000 - 07:49:11 PST |
Re: [SI-LIST] : Where for art thou Tantalum Caps? | [email protected] | Fri Feb 18 2000 - 10:34:08 PST |
[SI-LIST] : measuring radiation | yaserh | Sat Feb 19 2000 - 07:29:12 PST |
[SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Abe Riazi | Sat Feb 19 2000 - 08:37:19 PST |
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | S. Weir | Sat Feb 19 2000 - 14:18:45 PST |
Re: [SI-LIST] : measuring radiation | S. Weir | Sat Feb 19 2000 - 13:40:56 PST |
[SI-LIST] : SI Design Engineer Position at Stratus (pre-IPO) in Maynard, MA | Mango, Steve | Sun Feb 20 2000 - 06:08:38 PST |
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Abe Riazi | Sun Feb 20 2000 - 08:48:00 PST |
RE: [SI-LIST] : Power / Ground simulation | �L�·� | Sun Feb 20 2000 - 18:50:47 PST |
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | S. Weir | Sun Feb 20 2000 - 21:38:36 PST |
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Scott McMorrow | Sun Feb 20 2000 - 23:48:29 PST |
Re: [SI-LIST] : LVDS signal observation | David Instone | Mon Feb 21 2000 - 02:30:29 PST |
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Roy Leventhal | Mon Feb 21 2000 - 07:56:53 PST |
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Abe Riazi | Mon Feb 21 2000 - 11:03:07 PST |
[SI-LIST] : Stack up | Iulian Ungureanu | Mon Feb 21 2000 - 11:23:09 PST |
Re: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Scott McMorrow | Mon Feb 21 2000 - 12:08:58 PST |
[SI-LIST] : ESR and Bypass Caps, revisited and revised | Doug Brooks | Mon Feb 21 2000 - 15:12:59 PST |
Re: [SI-LIST] : Stack up | Doug McKean | Mon Feb 21 2000 - 15:51:40 PST |
Re: [SI-LIST] : Stack up | sweir | Mon Feb 21 2000 - 17:09:13 PST |
[SI-LIST] : Ibis question | Michael Kurten | Tue Feb 22 2000 - 02:11:19 PST |
Re: [SI-LIST] : Stack up | Lee Ritchey | Tue Feb 22 2000 - 07:46:59 PST |
RE: [SI-LIST] : Stack up | Iulian Ungureanu | Tue Feb 22 2000 - 09:47:53 PST |
Re: [SI-LIST] : Stack up | sweir | Tue Feb 22 2000 - 13:18:39 PST |
[SI-LIST] : Anyone interested in Howard's book (will trade for Poon's book) | Sage Gunderson | Tue Feb 22 2000 - 13:46:09 PST |
Re: [SI-LIST] : Anyone interested in Howard's book (will trade for Poon's book) | Doug Brooks | Tue Feb 22 2000 - 14:12:02 PST |
[SI-LIST] : SI POSITION | Clewell, Craig W | Tue Feb 22 2000 - 12:17:41 PST |
[SI-LIST] : Searching XTK utils. | Tadashi ARAI | Wed Feb 23 2000 - 03:03:13 PST |
Re: [SI-LIST] : Stack up | Lee Ritchey | Wed Feb 23 2000 - 07:51:22 PST |
Re: [SI-LIST] : Stack up | Scott McMorrow | Wed Feb 23 2000 - 10:23:57 PST |
RE: [SI-LIST] : Searching XTK utils. | Abe Riazi | Wed Feb 23 2000 - 10:59:49 PST |
RE: [SI-LIST] : Searching XTK utils. | Joe Socha | Wed Feb 23 2000 - 12:01:43 PST |
Re: [SI-LIST] : Stack up | sweir | Wed Feb 23 2000 - 12:37:05 PST |
[SI-LIST] : stripline PCB board shrinkage? | C Deibele | Wed Feb 23 2000 - 12:48:23 PST |
Re: [SI-LIST] : stripline PCB board shrinkage? | Ray Anderson | Wed Feb 23 2000 - 13:27:46 PST |
Re: [SI-LIST] : stripline PCB board shrinkage? | C Deibele | Wed Feb 23 2000 - 14:15:23 PST |
Re: [SI-LIST] : stripline PCB board shrinkage? | Bob Lewandowski | Wed Feb 23 2000 - 15:50:12 PST |
Re: [SI-LIST] : Stack up | Doug McKean | Wed Feb 23 2000 - 16:54:15 PST |
Re: [SI-LIST] : Searching XTK utils. | Richard Kuo | Wed Feb 23 2000 - 17:13:26 PST |
RE: [SI-LIST] : stripline PCB board shrinkage? | Dan Swanson | Thu Feb 24 2000 - 04:31:06 PST |
Re: [SI-LIST] : stripline PCB board shrinkage? | C Deibele | Thu Feb 24 2000 - 07:06:31 PST |
Re: [SI-LIST] : Stack up | Lee Ritchey | Thu Feb 24 2000 - 08:22:27 PST |
[SI-LIST] : SI opening at EMC! | zanella, fabrizio | Thu Feb 24 2000 - 08:32:08 PST |
RE: [SI-LIST] :What do inputs do? monotonic signals at SDRAM-, SSRAM - and FEPROM-a dress inputs | Jonathan Dowling | Thu Feb 24 2000 - 09:09:27 PST |
[SI-LIST] : Hopefully not a controversial question ... | Doug McKean | Thu Feb 24 2000 - 11:05:18 PST |
RE: [SI-LIST] : Stack up | Ronald E. Nikel | Thu Feb 24 2000 - 11:21:56 PST |
Re: [SI-LIST] : Hopefully not a controversial question ... | [email protected] | Thu Feb 24 2000 - 11:57:54 PST |
RE: [SI-LIST] : Hopefully not a controversial question ... | [email protected] | Thu Feb 24 2000 - 12:15:36 PST |
[SI-LIST] : Crosstalk graphs | Roy Leventhal | Thu Feb 24 2000 - 12:28:48 PST |
Re: [SI-LIST] : Hopefully not a controversial question ... | Doug McKean | Thu Feb 24 2000 - 13:55:29 PST |
Re: [SI-LIST] : Hopefully not a controversial question ... | [email protected] | Thu Feb 24 2000 - 14:11:04 PST |
Re: [SI-LIST] : Searching XTK utils. | Brad Griffin | Wed Feb 23 2000 - 00:43:25 PST |
RE: [SI-LIST] : High Speed Design by Rules of Thumb vs. Simulation | Steve Ting | Wed Feb 23 2000 - 00:50:46 PST |
RE: [SI-LIST] : Hopefully not a controversial question ... | George Borkowicz | Fri Feb 25 2000 - 06:36:04 PST |
[SI-LIST] : Bulk Capacitance | Cruz, Jose | Fri Feb 25 2000 - 10:45:02 PST |
Re: [SI-LIST] : Bulk Capacitance | Ray Anderson | Fri Feb 25 2000 - 11:08:01 PST |
RE: [SI-LIST] : Bulk Capacitance | Chang, Martin M | Fri Feb 25 2000 - 11:42:18 PST |
[SI-LIST] : Opportunities | Ron Miller | Fri Feb 25 2000 - 11:49:45 PST |
[SI-LIST] : Fast edge termination choice | Shayle Hirschman | Fri Feb 25 2000 - 06:34:27 PST |
RE: [SI-LIST] : Fast edge termination choice | Kowal, Keith | Fri Feb 25 2000 - 13:04:53 PST |
[SI-LIST] : Zener used to clamp Vcc? | Chris Bobek | Fri Feb 25 2000 - 14:20:16 PST |
RE: [SI-LIST] : Fast edge termination choice | Ingraham, Andrew | Fri Feb 25 2000 - 14:19:54 PST |
Re: [SI-LIST] : Fast edge termination choice | D. C. Sessions | Fri Feb 25 2000 - 14:32:21 PST |
RE: [SI-LIST] : Zener used to clamp Vcc? | WAUGH,RAY (HP-SanJose,ex1) | Fri Feb 25 2000 - 14:45:42 PST |
RE: [SI-LIST] : Fast edge termination choice | Shayle Hirschman | Fri Feb 25 2000 - 08:49:25 PST |
Re: [SI-LIST] : Zener used to clamp Vcc? | Vinu Arumugham | Fri Feb 25 2000 - 14:56:31 PST |
[SI-LIST] : Re: Opportunities | Ron Miller | Fri Feb 25 2000 - 15:42:34 PST |
RE: [SI-LIST] : Re: Opportunities | [email protected] | Fri Feb 25 2000 - 16:05:44 PST |
RE: [SI-LIST] : Zener used to clamp Vcc? | Tom Dagostino | Fri Feb 25 2000 - 16:14:46 PST |
Re: [SI-LIST] : Re: Opportunities | Scott McMorrow | Fri Feb 25 2000 - 17:13:55 PST |
[SI-LIST] : Opinions on SI CAE tools | Eli Fernald | Fri Feb 25 2000 - 15:26:39 PST |
Re: [SI-LIST] : Re: Opportunities | Bob Lewandowski | Fri Feb 25 2000 - 17:39:13 PST |
Re: [SI-LIST] : Re: Opportunities | [email protected] | Fri Feb 25 2000 - 18:10:18 PST |
RE: [SI-LIST] : Opinions on SI CAE tools | [email protected] | Fri Feb 25 2000 - 18:48:26 PST |
RE: [SI-LIST] : Fast edge termination choice | Peterson, James F (FL51) | Sat Feb 26 2000 - 07:42:16 PST |
Re: [SI-LIST] : Re: Opportunities | Ray Anderson | Wed Feb 23 2000 - 03:55:58 PST |
[SI-LIST] : Max Zo of Flat Flexible Cable | Peter Baxter | Sat Feb 26 2000 - 13:54:43 PST |
Re: [SI-LIST] : Max Zo of Flat Flexible Cable | Scott McMorrow | Sat Feb 26 2000 - 14:51:09 PST |
Re: [SI-LIST] : Max Zo of Flat Flexible Cable | Ronald Miller | Sat Feb 26 2000 - 18:55:00 PST |
R:[SI-LIST] : Zener used to clamp Vcc? | Vigliarolo Roberto | Mon Feb 28 2000 - 03:07:21 PST |
RE: [SI-LIST] : Hopefully not a controversial question ... | Grasso, Charles (Chaz) | Mon Feb 28 2000 - 07:56:27 PST |
RE: [SI-LIST] : Max Zo of Flat Flexible Cable | John Ellis | Mon Feb 28 2000 - 08:10:34 PST |
RE: [SI-LIST] : Opinions on SI CAE tools | Weston Beal | Mon Feb 28 2000 - 09:06:01 PST |
RE: [SI-LIST] : Re: Opportunities - Keep them coming!! | Grasso, Charles (Chaz) | Mon Feb 28 2000 - 09:51:07 PST |
Re: [SI-LIST] : Max Zo of Flat Flexible Cable | Ron Miller | Mon Feb 28 2000 - 11:27:28 PST |
Re: [SI-LIST] : Re: Opportunities | Ray Anderson | Mon Feb 28 2000 - 11:43:13 PST |
[SI-LIST] : Frequency or time domain for component characterization | Kai Keskinen | Mon Feb 28 2000 - 12:09:12 PST |
RE: [SI-LIST] : Max Zo of Flat Flexible Cable | Doug Piper | Mon Feb 28 2000 - 11:51:27 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | Ray Anderson | Mon Feb 28 2000 - 13:20:02 PST |
RE: [SI-LIST] : Zener used to clamp Vcc? | Tom Dagostino | Mon Feb 28 2000 - 14:57:16 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | Steve Corey | Mon Feb 28 2000 - 15:19:10 PST |
[SI-LIST] : Opportunities at Serverworks (skip the previous) | Jeremy Plunkett | Mon Feb 28 2000 - 15:44:44 PST |
[SI-LIST] : Software scope, VOM | Doug Brooks | Mon Feb 28 2000 - 16:22:11 PST |
Re: [SI-LIST] : Frequency or time domain for componentcharacterization | Ron Miller | Mon Feb 28 2000 - 16:54:58 PST |
[SI-LIST] : A excellent SI Engineer position in China | rachild.chen | Mon Feb 28 2000 - 17:26:56 PST |
Re: [SI-LIST] : Frequency or time domain for componentcharacterization | Aubrey Keith Sparkman | Mon Feb 28 2000 - 18:37:57 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | c deibele | Mon Feb 28 2000 - 18:36:59 PST |
RE: [SI-LIST] : A excellent SI Engineer position in China | Jeremy Plunkett | Mon Feb 28 2000 - 18:47:00 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | Scott McMorrow | Mon Feb 28 2000 - 19:47:26 PST |
[SI-LIST] : �ظ�: [SI-LIST] : A excellent SI Enginer position in Chin | rachild.chen | Mon Feb 28 2000 - 22:22:30 PST |
[SI-LIST] : (urgent) SI tool demand | Devrim Fidanci | Tue Feb 29 2000 - 00:12:36 PST |
Re: [SI-LIST] : (urgent) SI tool demand | Scott McMorrow | Tue Feb 29 2000 - 00:34:09 PST |
R:[SI-LIST] : Zener used to clamp Vcc? | Vigliarolo Roberto | Tue Feb 29 2000 - 01:24:22 PST |
RE: [SI-LIST] : Frequency or time domain for component characterization | [email protected] | Tue Feb 29 2000 - 03:31:41 PST |
[SI-LIST] : LVDS drive LCD | [email protected] | Tue Feb 29 2000 - 05:19:46 PST |
RE: [SI-LIST] : Frequency or time domain for component characteri zation | [email protected] | Tue Feb 29 2000 - 06:58:30 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | C Deibele | Tue Feb 29 2000 - 07:20:07 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | Scott McMorrow | Tue Feb 29 2000 - 08:55:07 PST |
Re: [SI-LIST] : Frequency or time domain for component characterization | Scott McMorrow | Tue Feb 29 2000 - 10:41:12 PST |
[SI-LIST] : What is the IEEE 802.3 (Gigabit Ethernet) reflector adr? | Loren Koehler | Tue Feb 29 2000 - 11:00:52 PST |
FW: [SI-LIST] : Training Suggestions Wanted | Michael O'Shaughnessy | Tue Feb 29 2000 - 11:43:48 PST |
RE: [SI-LIST] : Frequency or time domain for component characteri zation | George Borkowicz | Tue Feb 29 2000 - 11:57:47 PST |
RE: [SI-LIST] : What is the IEEE 802.3 (Gigabit Ethernet) reflect or adr? | Farrokh Mottahedin | Tue Feb 29 2000 - 15:08:46 PST |
[SI-LIST] : How to measure differential pattern on test coupon? | �B�n�d | Tue Feb 29 2000 - 23:33:53 PST |
AW: [SI-LIST] : How to measure differential pattern on test coupo n? | John, Hans-Joerg | Wed Mar 01 2000 - 01:15:06 PST |
[SI-LIST] : 2MM Connectors Standards Committee | Doug Piper | Wed Mar 01 2000 - 07:14:51 PST |
Re: [SI-LIST] : 2MM Connectors Standards Committee | [email protected] | Wed Mar 01 2000 - 09:08:25 PST |
[SI-LIST] : Adding inductors to ground? | Chris Bobek | Wed Mar 01 2000 - 14:14:49 PST |
[SI-LIST] : spice directional coupler model | Ray Anderson | Wed Mar 01 2000 - 14:38:31 PST |
RE: [SI-LIST] : Adding inductors to ground? | Zabinski, Patrick J. | Wed Mar 01 2000 - 15:15:02 PST |
Re: [SI-LIST] : Adding inductors to ground? | Vinu Arumugham | Wed Mar 01 2000 - 15:35:14 PST |
RE: [SI-LIST] : Adding inductors to ground? | Giri Gopalan | Wed Mar 01 2000 - 15:58:29 PST |
Re: [SI-LIST] : Crosstalk graphs | Doug McKean | Wed Mar 01 2000 - 16:06:34 PST |
Re: [SI-LIST] : Adding inductors to ground? | Scott McMorrow | Wed Mar 01 2000 - 16:15:24 PST |
[SI-LIST] : ACCEL's "signal integrity" tool | Andy Peters | Wed Mar 01 2000 - 17:02:44 PST |
RE: [SI-LIST] : Adding inductors to ground? | sweir | Wed Mar 01 2000 - 17:21:52 PST |
Re: [SI-LIST] : Adding inductors to ground? | D. C. Sessions | Wed Mar 01 2000 - 17:48:08 PST |
RE: [SI-LIST] : How to measure differential pattern on test coupo n? | �B�n�d | Wed Mar 01 2000 - 18:10:16 PST |
[SI-LIST] : HSPICE: Delay and invert a differential signal w.r.t to another. | Vipul Badoni | Thu Mar 02 2000 - 00:02:57 PST |
Re: [SI-LIST] : HSPICE: Delay and invert a differential signal w.r.t to another. | A. D. Shripadaraj | Thu Mar 02 2000 - 01:29:21 PST |
Re: [SI-LIST] : How to measure differential pattern on test coupo n? | David Instone | Thu Mar 02 2000 - 02:18:19 PST |
AW: [SI-LIST] : How to measure differential pattern on test coupo n? | Ulrich Mussler | Thu Mar 02 2000 - 03:36:20 PST |
[SI-LIST] : FYI: SPICE coupled w element bug in 99.4 | Greim, Michael | Thu Mar 02 2000 - 04:41:01 PST |
Re: [SI-LIST] : ACCEL's "signal integrity" tool | Mikhail Matusov | Thu Mar 02 2000 - 06:45:02 PST |
Re: [SI-LIST] : ACCEL's "signal integrity" tool | [email protected] | Thu Mar 02 2000 - 07:20:14 PST |
Re: [SI-LIST] : ACCEL's "signal integrity" tool | Matthias Mansfeld | Thu Mar 02 2000 - 08:15:18 PST |
[SI-LIST] : HSplot | Peterson, George W | Thu Mar 02 2000 - 09:16:29 PST |
Re: [SI-LIST] : Adding inductors to ground? | Vinu Arumugham | Thu Mar 02 2000 - 10:35:22 PST |
RE: [SI-LIST] : Adding inductors to ground? | Ray Anderson | Thu Mar 02 2000 - 11:12:22 PST |
Re: [SI-LIST] : How to measure differential pattern on test coupon? | Bob Lewandowski | Thu Mar 02 2000 - 11:36:31 PST |
Re: [SI-LIST] : Adding inductors to ground? | bgrossma | Thu Mar 02 2000 - 11:41:17 PST |
RE: [SI-LIST] : Adding inductors to ground? | Istvan Novak - Board Design Technology | Thu Mar 02 2000 - 11:56:49 PST |
[SI-LIST] : Re: Differential measurements | Fred Balistreri | Thu Mar 02 2000 - 13:05:00 PST |
Re: [SI-LIST] : Adding inductors to ground? | D. C. Sessions | Thu Mar 02 2000 - 13:45:15 PST |
Re: [SI-LIST] : How to measure differential pattern on testcoupon? | Ron Miller | Thu Mar 02 2000 - 16:07:52 PST |
Re: [SI-LIST] : Adding inductors to ground? | Ritchey Lee | Thu Mar 02 2000 - 17:46:33 PST |
Re: [SI-LIST] : Adding inductors to ground? | Lum Wee Mei | Fri Mar 03 2000 - 01:14:48 PST |
[SI-LIST] : PCB fabrication technology - what's new? | Andrew Phillips | Fri Mar 03 2000 - 05:30:09 PST |
RE: [SI-LIST] : Adding inductors to ground? | Mayer, Mike | Fri Mar 03 2000 - 05:48:38 PST |
[SI-LIST] : Islands of Power | Keith Amundsen | Fri Mar 03 2000 - 06:49:01 PST |
Re: [SI-LIST] : Islands of Power | D. C. Sessions | Fri Mar 03 2000 - 08:07:11 PST |
Re: [SI-LIST] : PCB fabrication technology - what's new? | Shawn X. Arnold | Fri Mar 03 2000 - 08:47:44 PST |
Re: [SI-LIST] : Adding inductors to ground? | Chris Bobek | Fri Mar 03 2000 - 08:49:54 PST |
RE: [SI-LIST] : Adding inductors to ground? | [email protected] | Fri Mar 03 2000 - 08:58:55 PST |
RE: [SI-LIST] : PCB fabrication technology - what's new? | Kai Keskinen | Fri Mar 03 2000 - 08:00:52 PST |
RE: [SI-LIST] : Adding inductors to ground? | Martin thompson | Fri Mar 03 2000 - 09:08:19 PST |
RE: [SI-LIST] : Adding inductors to ground? | Larry Smith | Fri Mar 03 2000 - 09:55:16 PST |
RE: [SI-LIST] : Adding inductors to ground? | Ray Anderson | Fri Mar 03 2000 - 12:22:47 PST |
[SI-LIST] : Opinions on Americom HF Digital Design course? | gacrowell | Fri Mar 03 2000 - 14:57:42 PST |
Re: [SI-LIST] : Crosstalk graphs | Ritchey Lee | Fri Mar 03 2000 - 16:07:50 PST |
Re: [SI-LIST] : ACCEL's "signal integrity" tool | Ritchey Lee | Fri Mar 03 2000 - 16:08:44 PST |
Re: [SI-LIST] : Islands of Power | Ritchey Lee | Fri Mar 03 2000 - 16:46:15 PST |
Re: [SI-LIST] : Adding inductors to ground? | Ritchey Lee | Fri Mar 03 2000 - 16:50:44 PST |
Re: [SI-LIST] : Islands of Power | S. Weir | Sat Mar 04 2000 - 04:05:53 PST |
RE: [SI-LIST] : Adding inductors to ground? | S. Weir | Sat Mar 04 2000 - 04:16:06 PST |
[SI-LIST] : SpectraQuest vs XTK | Shannon Roseman | Sat Mar 04 2000 - 23:15:28 PST |
Re: [SI-LIST] : SpectraQuest vs XTK | Tadashi ARAI | Sun Mar 05 2000 - 23:31:57 PST |
R:[SI-LIST] : Adding inductors to ground? | Vigliarolo Roberto | Mon Mar 06 2000 - 03:26:58 PST |
Re: [SI-LIST] : Crosstalk graphs | Mike Ventham | Mon Mar 06 2000 - 06:17:05 PST |
Re: [SI-LIST] : SpectraQuest vs XTK | Todd Westerhoff | Mon Mar 06 2000 - 07:47:36 PST |
RE: [SI-LIST] : SpectraQuest vs XTK | Le, Dat (dle) | Mon Mar 06 2000 - 10:57:39 PST |
[SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Alex Li | Mon Mar 06 2000 - 18:36:01 PST |
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Greim, Michael | Tue Mar 07 2000 - 05:28:51 PST |
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Fred Dehkordi | Tue Mar 07 2000 - 06:43:23 PST |
AW: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Netzler Dirk | Tue Mar 07 2000 - 07:05:14 PST |
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Greim, Michael | Tue Mar 07 2000 - 07:09:18 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Shawn X. Arnold | Tue Mar 07 2000 - 08:39:09 PST |
[SI-LIST] : MPC860 IBIS model | Dennis Tomlinson | Tue Mar 07 2000 - 09:03:45 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | [email protected] | Tue Mar 07 2000 - 09:17:42 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | [email protected] | Tue Mar 07 2000 - 09:40:48 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | [email protected] | Tue Mar 07 2000 - 10:14:33 PST |
RE: [SI-LIST] : MPC860 IBIS model | Mayer, Mike | Tue Mar 07 2000 - 10:16:36 PST |
[SI-LIST] : Posting from multiple account addresses | Ray Anderson | Tue Mar 07 2000 - 10:27:31 PST |
RE: [SI-LIST] : PCB fabrication technology - what's new? | Gaines, William | Tue Mar 07 2000 - 10:33:56 PST |
[SI-LIST] : TDR system information | subas | Tue Mar 07 2000 - 10:41:13 PST |
Re: [SI-LIST] : SpectraQuest vs XTK | S Weir | Tue Mar 07 2000 - 10:46:58 PST |
Re: [SI-LIST] : ACCEL's "signal integrity" tool | Lukas Louw | Tue Mar 07 2000 - 10:52:07 PST |
RE: [SI-LIST] : Software scope, VOM | Jon Powell | Tue Mar 07 2000 - 10:57:06 PST |
Re: [SI-LIST] : MPC860 IBIS model | Scott McMorrow | Tue Mar 07 2000 - 11:04:42 PST |
Re: [SI-LIST] : Software scope, VOM, follow-up answer | Doug Brooks | Tue Mar 07 2000 - 11:44:36 PST |
RE: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | jwalden | Tue Mar 07 2000 - 11:51:49 PST |
RE: [SI-LIST] : ACCEL's "signal integrity" tool | Clewell, Craig W | Tue Mar 07 2000 - 12:38:07 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Abd ul-Rahman Lomax | Tue Mar 07 2000 - 12:58:40 PST |
[SI-LIST] : Looking for Ultra3 SCSI LVDlink routing guidelines....... | Greim, Michael | Tue Mar 07 2000 - 13:30:08 PST |
[SI-LIST] : factors affecting source synchronus timing | Ken Wu | Tue Mar 07 2000 - 13:49:27 PST |
[SI-LIST] : RE: | Andy Peters | Tue Mar 07 2000 - 13:45:54 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | Nirmal Jain | Tue Mar 07 2000 - 13:58:46 PST |
RE: [SI-LIST] :PCB Bd thkness' | Dave Hoover | Tue Mar 07 2000 - 14:10:22 PST |
RE: [SI-LIST] :PCB Bd thkness' | Chris Padilla | Tue Mar 07 2000 - 14:27:43 PST |
Re: [SI-LIST] :PCB Bd thkness' | Scott McMorrow | Tue Mar 07 2000 - 14:35:18 PST |
Re: [SI-LIST] :PCB Bd thkness' | [email protected] | Tue Mar 07 2000 - 14:52:34 PST |
RE: [SI-LIST] :PCB Bd thkness' | [email protected] | Tue Mar 07 2000 - 14:52:49 PST |
RE: [SI-LIST] : SpectraQuest vs XTK | Scott Brenneman | Tue Mar 07 2000 - 15:12:28 PST |
RE: [SI-LIST] :PCB Bd thkness' | Scott Brenneman | Tue Mar 07 2000 - 15:09:59 PST |
[SI-LIST] : Medium range capacitors | Shayle Hirschman | Tue Mar 07 2000 - 10:20:37 PST |
[SI-LIST] : Standard's Lore | Chris Padilla | Tue Mar 07 2000 - 17:25:08 PST |
[SI-LIST] : IBIS EUROPEAN SUMMIT MEETING THIRD ANNOUNCEMENT | Bob Ross | Tue Mar 07 2000 - 17:28:19 PST |
RE: [SI-LIST] : SpectraQuest vs XTK | Chris Cheng | Tue Mar 07 2000 - 17:36:50 PST |
Re: [SI-LIST] : Medium range capacitors | sweir | Tue Mar 07 2000 - 17:42:00 PST |
Re: [SI-LIST] : Medium range capacitors | Shayle Hirschman | Tue Mar 07 2000 - 12:44:27 PST |
Re: [SI-LIST] :PCB Bd thkness' | Lum Wee Mei | Tue Mar 07 2000 - 19:20:35 PST |
Re: [SI-LIST] : Medium range capacitors | sweir | Tue Mar 07 2000 - 19:21:50 PST |
Re: [SI-LIST] : different 4-layer board Stack up (S-P-G-S) ? | David Instone | Wed Mar 08 2000 - 01:55:56 PST |
RE: [SI-LIST] :PCB Bd thkness' | Killoy Richard-P29744 | Wed Mar 08 2000 - 07:32:19 PST |
Re: [SI-LIST] :PCB Bd thkness' | David Instone | Wed Mar 08 2000 - 08:21:22 PST |
Re: [SI-LIST] :PCB Bd thkness' | Kim Helliwell | Wed Mar 08 2000 - 08:48:41 PST |
Re: [SI-LIST] : Medium range capacitors | Larry Smith | Wed Mar 08 2000 - 08:59:46 PST |
Re: [SI-LIST] : Medium range capacitors | Shayle Hirschman | Wed Mar 08 2000 - 03:35:44 PST |
[SI-LIST] : Hatch | DORIN OPREA | Wed Mar 08 2000 - 09:53:37 PST |
Re: [SI-LIST] : Medium range capacitors | sweir | Wed Mar 08 2000 - 10:20:34 PST |
Re: [SI-LIST] : Hatch | [email protected] | Wed Mar 08 2000 - 12:05:15 PST |
RE: [SI-LIST] : LVDS driving PCML | Tom Dagostino | Thu Mar 09 2000 - 08:57:24 PST |
RE: [SI-LIST] : why .062? | Gaines, William | Thu Mar 09 2000 - 08:41:17 PST |
Re: [SI-LIST] : why .062? | rbishop | Thu Mar 09 2000 - 07:32:44 PST |
[SI-LIST] : RE: [IS-LIST] : why .062? | Mayer, Mike | Thu Mar 09 2000 - 06:27:03 PST |
RE: [SI-LIST] : Hi SI-gurus, One stupid question: Take a long (sa y 10 ft) long rod of perfect conductor (say copper) and connect one of i ts end to the +ve terminal of a battery through a switch. The other end of the battery is grounded to the earth. Now | Ingraham, Andrew | Thu Mar 09 2000 - 05:55:05 PST |
[SI-LIST] : job opportunity | Peterson, James F (FL51) | Thu Mar 09 2000 - 04:53:04 PST |
RE: [SI-LIST] : why .062? | Cusanelli, Tony | Thu Mar 09 2000 - 03:08:27 PST |
Re: [SI-LIST] : tracking/oversampling PLL architectures | David Instone | Thu Mar 09 2000 - 01:56:24 PST |
[SI-LIST] : Your experience with equivalent circuit modeling tools ... | Christian Schuster | Thu Mar 09 2000 - 00:16:38 PST |
Re: [SI-LIST] : LVDS driving PCML | sweir | Wed Mar 08 2000 - 20:55:23 PST |
[SI-LIST] : Where can I get some design informations about CPCI? | rachild.chen | Wed Mar 08 2000 - 19:31:14 PST |
Re: [SI-LIST] : LVDS driving PCML | [email protected] | Wed Mar 08 2000 - 20:44:08 PST |
[SI-LIST] : LVDS driving PCML | Julia Nekrylova | Wed Mar 08 2000 - 18:41:26 PST |
[SI-LIST] : tracking/oversampling PLL architectures | Ooi, Thien Ern | Wed Mar 08 2000 - 18:58:32 PST |
Re: [SI-LIST] : Hi SI-gurus,One stupid question | Bob Lewandowski | Wed Mar 08 2000 - 18:07:04 PST |
[SI-LIST] : March 14, EMC Society Meeting Notice, "Shielding and Grounding for GHz Processors and Beyond" | Hans Mellberg | Thu Mar 09 2000 - 10:48:00 PST |
Re: [SI-LIST] : Where can I get some design informations about CPCI? | Shawn X. Arnold | Thu Mar 09 2000 - 12:22:15 PST |
Re: [SI-LIST] : why .062? | Adrian Shiner | Thu Mar 09 2000 - 12:17:37 PST |
Re: [SI-LIST] : RE: [IS-LIST] : why .062? | Adrian Shiner | Thu Mar 09 2000 - 12:20:01 PST |
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Dima Smolyansky | Thu Mar 09 2000 - 13:34:44 PST |
[SI-LIST] : RE: +AFs-SI-LIST+AF0- : Where can I get some design informations about CPCI? | Keith Amundsen | Thu Mar 09 2000 - 13:57:31 PST |
[SI-LIST] : ribbon cable models | Rehm, Dennis | Thu Mar 09 2000 - 14:06:52 PST |
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Ray Anderson | Thu Mar 09 2000 - 14:14:19 PST |
Re: [SI-LIST] : ribbon cable models | Ray Anderson | Thu Mar 09 2000 - 14:23:45 PST |
[SI-LIST] : Job opening at Cisco | qzhao | Thu Mar 09 2000 - 14:58:57 PST |
Re: [SI-LIST] : why .062? | [email protected] | Thu Mar 09 2000 - 16:10:20 PST |
[SI-LIST] : Sorry for HMTL/SOS for CPCI | rachild.chen | Thu Mar 09 2000 - 17:07:33 PST |
Re: [SI-LIST] : ribbon cable models | Tadashi ARAI | Fri Mar 10 2000 - 01:16:39 PST |
[SI-LIST] : Now SI Engineer job positions is in Shenzhen China | rachild.chen | Fri Mar 10 2000 - 01:36:11 PST |
RE: [SI-LIST] : ribbon cable models | Clewell, Craig W | Fri Mar 10 2000 - 05:35:00 PST |
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Christian Schuster | Fri Mar 10 2000 - 05:42:11 PST |
RE: [SI-LIST] : ribbon cable models | Fasig, Jonathan L. | Fri Mar 10 2000 - 05:50:24 PST |
Re: [SI-LIST] :PCB Bd thkness' | Ritchey Lee | Fri Mar 10 2000 - 08:02:47 PST |
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Weston Beal | Fri Mar 10 2000 - 09:01:44 PST |
[SI-LIST] : Signal Integrity Positions at Lightsand | amit agrawal | Fri Mar 10 2000 - 10:27:52 PST |
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Ingraham, Andrew | Fri Mar 10 2000 - 10:32:12 PST |
RE: [SI-LIST] : ribbon cable models | Kai Keskinen | Fri Mar 10 2000 - 10:33:37 PST |
RE: [SI-LIST] : ribbon cable models | DAmbrosia, John F | Fri Mar 10 2000 - 10:52:14 PST |
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Tom Dagostino | Fri Mar 10 2000 - 12:02:21 PST |
Re: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | Dima Smolyansky | Fri Mar 10 2000 - 14:17:54 PST |
RE: [SI-LIST] : tracking/oversampling PLL architectures | Ooi, Thien Ern | Fri Mar 10 2000 - 17:29:09 PST |
RE: [SI-LIST] : LVDS driving PCML | Degerstrom, Michael J. | Fri Mar 10 2000 - 17:44:11 PST |
[SI-LIST] : EPEP 2000 Call For Papers | Ray Anderson | Sun Mar 12 2000 - 11:16:32 PST |
[SI-LIST] : trace width for clock routing- wider/narrower? | �L�·� | Sun Mar 12 2000 - 17:04:50 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | S. Weir | Sun Mar 12 2000 - 17:29:08 PST |
RE: [SI-LIST] : trace width for clock routing- wider/narrower? | Weber Chuang | Sun Mar 12 2000 - 18:34:07 PST |
[SI-LIST] : VTT supply | Jeff | Sun Mar 12 2000 - 23:55:52 PST |
Re: [SI-LIST] : VTT supply | S. Weir | Mon Mar 13 2000 - 00:21:22 PST |
RE: [SI-LIST] : trace width for clock routing- wider/narrower? | S. Weir | Mon Mar 13 2000 - 00:43:33 PST |
Re: [SI-LIST] : VTT supply | [email protected] | Mon Mar 13 2000 - 02:14:05 PST |
RE: [SI-LIST] : trace width for clock routing- wider/narrower? | Greim, Michael | Mon Mar 13 2000 - 05:06:42 PST |
RE: [SI-LIST] : LVDS driving PCML | Greim, Michael | Mon Mar 13 2000 - 05:21:27 PST |
[SI-LIST] : 2 Layer Boards and Ground Grids | Spencer, David H | Mon Mar 13 2000 - 06:45:31 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | Ritchey Lee | Mon Mar 13 2000 - 08:05:36 PST |
RE: [SI-LIST] : VTT supply | Muranyi, Arpad | Mon Mar 13 2000 - 08:19:09 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | Vinu Arumugham | Mon Mar 13 2000 - 09:47:26 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | Doug Brooks | Mon Mar 13 2000 - 10:28:52 PST |
Re: [SI-LIST] : Software scope, VOM | Norbert Seitz | Mon Mar 13 2000 - 10:38:40 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | Gerald Johnson | Mon Mar 13 2000 - 10:53:19 PST |
RE: [SI-LIST] : VTT supply | Chris Cheng | Mon Mar 13 2000 - 11:07:32 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | Scott McMorrow | Mon Mar 13 2000 - 11:27:31 PST |
RE: [SI-LIST] : tracking/oversampling PLL architectures | Keith Amundsen | Mon Mar 13 2000 - 12:01:08 PST |
RE: [SI-LIST] : tracking/oversampling PLL architectures | Lyke James Civ AFRL/VSSE | Mon Mar 13 2000 - 12:26:41 PST |
Re: [SI-LIST] : trace width for clock routing- wider/narrower? | Doug Brooks | Mon Mar 13 2000 - 12:38:46 PST |
RE: [SI-LIST] : trace width for clock routing- wider/narrower? | �L�·� | Mon Mar 13 2000 - 17:00:21 PST |
[SI-LIST] : SSC | subas | Mon Mar 13 2000 - 23:09:02 PST |
Re: [SI-LIST] : SSC | sweir | Mon Mar 13 2000 - 23:55:11 PST |
Re: [SI-LIST] : SSC | Krishnan S Rengarajan | Mon Mar 13 2000 - 23:55:59 PST |
Re: [SI-LIST] : SSC | [email protected] | Tue Mar 14 2000 - 00:09:51 PST |
Re: [SI-LIST] : SSC | Tadashi ARAI | Tue Mar 14 2000 - 00:26:27 PST |
RE: [SI-LIST] : tracking/oversampling PLL architectures | Keith Amundsen | Tue Mar 14 2000 - 07:35:21 PST |
Re: [SI-LIST] : SSC | [email protected] | Tue Mar 14 2000 - 08:37:27 PST |
[SI-LIST] : Board simulations, what should it include? | Yehuda D. Yizraeli | Tue Mar 14 2000 - 09:24:35 PST |
RE: [SI-LIST] : SSC | Zhang, Michael T | Tue Mar 14 2000 - 09:29:57 PST |
Re: [SI-LIST] : 2 Layer Boards and Ground Grids | [email protected] | Tue Mar 14 2000 - 09:28:21 PST |
Re: [SI-LIST] : Board simulations, what should it include? | James Antonellis - Sun BOS Hardware | Tue Mar 14 2000 - 10:24:18 PST |
RE: [SI-LIST] : trace width for clock routing- wider/narrower? | Grasso, Charles (Chaz) | Tue Mar 14 2000 - 10:39:30 PST |
[SI-LIST] : trace impedance | [email protected] | Tue Mar 14 2000 - 12:50:14 PST |
RE: [SI-LIST] : SSC | Yu Wang | Tue Mar 14 2000 - 13:16:05 PST |
RE: [SI-LIST] : SSC | Zhang, Michael T | Tue Mar 14 2000 - 13:35:28 PST |
Re: [SI-LIST] : SSC | [email protected] | Tue Mar 14 2000 - 15:14:49 PST |
Re: [SI-LIST] : SSC | Krishnan S Rengarajan | Tue Mar 14 2000 - 19:56:52 PST |
RE: [SI-LIST] : tracking/oversampling PLL architectures | Jeff | Tue Mar 14 2000 - 22:24:30 PST |
Re: [SI-LIST] : SSC | Jeff | Tue Mar 14 2000 - 22:49:01 PST |
Re: [SI-LIST] : VTT supply | Jeff | Tue Mar 14 2000 - 22:56:14 PST |
RE: [SI-LIST] : VTT supply | Jeff | Tue Mar 14 2000 - 23:09:49 PST |
[SI-LIST] : CDM and HDM models of | Jan Vercammen | Wed Mar 15 2000 - 00:52:34 PST |
Re: [SI-LIST] : CDM and HDM models of | Krishnan S Rengarajan | Wed Mar 15 2000 - 03:19:18 PST |
RE: [SI-LIST] : Your experience with equivalent circuit modeling tools ... | zanella, fabrizio | Wed Mar 15 2000 - 10:55:43 PST |
[SI-LIST] : Job Opening at Cisco in San Jose, CA - EMC Design Engineer | Neven Pischl | Wed Mar 15 2000 - 11:30:41 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Wed Mar 15 2000 - 14:24:37 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Wed Mar 15 2000 - 14:29:28 PST |
Re: [SI-LIST] : Bad IBIS models! | Roy Leventhal | Wed Mar 15 2000 - 14:35:27 PST |
Re: [SI-LIST] : Bad IBIS models! | Stephen Nolan | Wed Mar 15 2000 - 14:36:07 PST |
Re: [SI-LIST] : Bad IBIS models! | Roy Leventhal | Wed Mar 15 2000 - 14:38:16 PST |
Re: [SI-LIST] : Bad IBIS models! | Roy Leventhal | Wed Mar 15 2000 - 14:43:26 PST |
RE: [SI-LIST] : Bad IBIS models! | Weston Beal | Wed Mar 15 2000 - 15:08:23 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Wed Mar 15 2000 - 14:08:25 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Wed Mar 15 2000 - 14:03:03 PST |
RE: [SI-LIST] : Bad IBIS models! | Mayer, Mike | Wed Mar 15 2000 - 14:21:16 PST |
Re: [SI-LIST] : Bad IBIS models! | Scott McMorrow | Wed Mar 15 2000 - 14:09:17 PST |
RE: [SI-LIST] : Bad IBIS models! | Dan Bostan | Wed Mar 15 2000 - 13:12:59 PST |
Re: [SI-LIST] : Bad IBIS models! | Bob Perlman | Wed Mar 15 2000 - 13:33:40 PST |
Re: [SI-LIST] : Bad IBIS models! | Roy Leventhal | Wed Mar 15 2000 - 13:55:00 PST |
Re: [SI-LIST] : Bad IBIS models! | Scott McMorrow | Wed Mar 15 2000 - 14:03:22 PST |
[SI-LIST] : Bad IBIS models! | Kim Helliwell | Wed Mar 15 2000 - 12:53:59 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Wed Mar 15 2000 - 15:10:44 PST |
RE: [SI-LIST] : Bad IBIS models! | Weston Beal | Wed Mar 15 2000 - 15:18:42 PST |
Re: [SI-LIST] : Bad IBIS models! | Brian Young | Wed Mar 15 2000 - 15:42:47 PST |
Re: [SI-LIST] : A basic question | Brian Young | Fri Mar 17 2000 - 06:30:39 PST |
RE: [SI-LIST] : A basic question | Ingraham, Andrew | Fri Mar 17 2000 - 06:56:47 PST |
RE: [SI-LIST] : A basic question | Peterson, James F (FL51) | Fri Mar 17 2000 - 05:53:59 PST |
Re: [SI-LIST] : A basic question | Brian Young | Fri Mar 17 2000 - 06:19:27 PST |
RE: [SI-LIST] : A basic question | Zabinski, Patrick J. | Fri Mar 17 2000 - 06:16:01 PST |
Re: [SI-LIST] : A basic question | [email protected] | Fri Mar 17 2000 - 05:31:40 PST |
RE: [SI-LIST] : A basic question | Daniel, Erik S. | Fri Mar 17 2000 - 06:07:48 PST |
RE: [SI-LIST] : A basic question | Clewell, Craig W | Fri Mar 17 2000 - 05:39:10 PST |
RE: [SI-LIST] : A basic question | Daniel, Erik S. | Fri Mar 17 2000 - 05:55:48 PST |
[SI-LIST] : A basic question | Peterson, James F (FL51) | Fri Mar 17 2000 - 05:00:49 PST |
RE: [SI-LIST] : A basic question | Zabinski, Patrick J. | Fri Mar 17 2000 - 05:31:50 PST |
RE: [SI-LIST] : A basic question | Peterson, James F (FL51) | Fri Mar 17 2000 - 05:51:24 PST |
Re: [SI-LIST] : Ferrite bead | sweir | Fri Mar 17 2000 - 05:05:45 PST |
[SI-LIST] : Ferrite bead | Sunil Kumar | Fri Mar 17 2000 - 00:19:40 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Thu Mar 16 2000 - 14:15:58 PST |
Re: [SI-LIST] : Ferrite bead | Istvan NOVAK | Fri Mar 17 2000 - 05:00:26 PST |
Re: [SI-LIST] : Bad IBIS models! | Tadashi ARAI | Thu Mar 16 2000 - 19:47:14 PST |
Re: [SI-LIST] : Bad IBIS models! | Richard G. Munden | Thu Mar 16 2000 - 21:43:15 PST |
Re: [SI-LIST] : Bad IBIS models! | Roy Leventhal | Thu Mar 16 2000 - 13:25:34 PST |
Re: [SI-LIST] : Bad IBIS models! | Brian Young | Thu Mar 16 2000 - 13:08:51 PST |
RE: [SI-LIST] : Bad IBIS models! | Mayer, Mike | Thu Mar 16 2000 - 13:38:43 PST |
RE: [SI-LIST] : Bad IBIS models! | Mayer, Mike | Thu Mar 16 2000 - 12:43:46 PST |
Re: [SI-LIST] : Bad IBIS models! | Brian Young | Thu Mar 16 2000 - 12:08:39 PST |
RE: [SI-LIST] : SI Software for EMC | Knighten, Jim L | Thu Mar 16 2000 - 10:50:29 PST |
Re: [SI-LIST] : SI Software for EMC | [email protected] | Thu Mar 16 2000 - 09:51:18 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Thu Mar 16 2000 - 09:50:02 PST |
RE: [SI-LIST] : SI Software for EMC | Weston Beal | Thu Mar 16 2000 - 09:41:06 PST |
RE: [SI-LIST] : printed resistors | Gaines, William | Thu Mar 16 2000 - 09:45:07 PST |
Re: [SI-LIST] : printed resistors | Istvan Novak - Board Design Technology | Thu Mar 16 2000 - 07:32:18 PST |
[SI-LIST] : Position available | Dennis Tomlinson | Thu Mar 16 2000 - 09:00:31 PST |
Re: [SI-LIST] : Bad IBIS models! | Brian Young | Thu Mar 16 2000 - 07:33:37 PST |
[SI-LIST] : SI Software for EMC | [email protected] | Thu Mar 16 2000 - 06:29:34 PST |
Re: [SI-LIST] : Bad IBIS models! | Roy Leventhal | Thu Mar 16 2000 - 07:05:20 PST |
Re: [SI-LIST] : Bad IBIS models! | Mike LaBonte | Thu Mar 16 2000 - 05:29:21 PST |
Re: [SI-LIST] : Bad IBIS models! | Mike LaBonte | Thu Mar 16 2000 - 05:54:32 PST |
Re: [SI-LIST] : Bad IBIS models! | Laurence Michaels | Thu Mar 16 2000 - 06:47:33 PST |
Re: [SI-LIST] : Bad IBIS models! | Mike LaBonte | Thu Mar 16 2000 - 05:43:01 PST |
Re: [SI-LIST] : Bad IBIS models! | Tadashi ARAI | Wed Mar 15 2000 - 18:00:48 PST |
[SI-LIST] : Program: Workshop on SIGNAL PROPAGATION ON INTERCONNECTS | Treytnar Dieter | Thu Mar 16 2000 - 01:34:04 PST |
Re: [SI-LIST] : SSC | [email protected] | Wed Mar 15 2000 - 19:20:15 PST |
RE: [SI-LIST] : Bad IBIS models! | John Phillips | Thu Mar 16 2000 - 01:32:38 PST |
RE: [SI-LIST] : A basic question | [email protected] | Fri Mar 17 2000 - 08:06:20 PST |
RE: [SI-LIST] : A basic question | [email protected] | Fri Mar 17 2000 - 08:15:07 PST |
[SI-LIST] : Fast edges with limited plane capacitance | mjs | Fri Mar 17 2000 - 08:29:33 PST |
RE: [SI-LIST] : A basic question | Jian Zheng | Fri Mar 17 2000 - 08:39:02 PST |
Re: [SI-LIST] : A basic question | [email protected] | Fri Mar 17 2000 - 09:27:42 PST |
FW: [SI-LIST] : A basic question | Peterson, James F (FL51) | Fri Mar 17 2000 - 09:39:12 PST |
RE: [SI-LIST] : A basic question | Larry Smith | Fri Mar 17 2000 - 09:42:02 PST |
RE: [SI-LIST] : Bad IBIS models! | Muranyi, Arpad | Fri Mar 17 2000 - 10:07:57 PST |
RE: [SI-LIST] : Bad IBIS models! | Muranyi, Arpad | Fri Mar 17 2000 - 10:15:00 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Larry Smith | Fri Mar 17 2000 - 10:17:04 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Fri Mar 17 2000 - 10:25:52 PST |
RE: [SI-LIST] : Bad IBIS models! | Muranyi, Arpad | Fri Mar 17 2000 - 10:32:08 PST |
RE: [SI-LIST] : Bad IBIS models! | Muranyi, Arpad | Fri Mar 17 2000 - 10:41:26 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Vinu Arumugham | Fri Mar 17 2000 - 10:50:36 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Fri Mar 17 2000 - 10:51:38 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Doug McKean | Fri Mar 17 2000 - 11:02:36 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Vinu Arumugham | Fri Mar 17 2000 - 11:07:12 PST |
RE: [SI-LIST] : Bad IBIS models! | Muranyi, Arpad | Fri Mar 17 2000 - 11:07:45 PST |
RE: [SI-LIST] : Fast edges with limited plane capacitance | Mayer, Mike | Fri Mar 17 2000 - 11:11:55 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Ron Miller | Fri Mar 17 2000 - 11:13:44 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Ron Miller | Fri Mar 17 2000 - 11:18:42 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Fri Mar 17 2000 - 11:21:51 PST |
Re: [SI-LIST] : Bad IBIS models! | Kim Helliwell | Fri Mar 17 2000 - 11:33:00 PST |
RE: [SI-LIST] : Bad IBIS models! | Tom Dagostino | Fri Mar 17 2000 - 11:51:56 PST |
Re: [SI-LIST] : A basic question | amit agrawal | Fri Mar 17 2000 - 11:53:25 PST |
RE: [SI-LIST] : Bad IBIS models! | Bob Perlman | Fri Mar 17 2000 - 11:48:12 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Fred Balistreri | Fri Mar 17 2000 - 11:37:21 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Fri Mar 17 2000 - 12:17:08 PST |
Re: [SI-LIST] : Bad IBIS models! - Business thoughts | Adrian Shiner | Fri Mar 17 2000 - 11:45:58 PST |
Re: [SI-LIST] : A basic question | Fred Balistreri | Fri Mar 17 2000 - 12:30:57 PST |
RE: [SI-LIST] : Bad IBIS models! | Mayer, Mike | Fri Mar 17 2000 - 12:46:38 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Doug McKean | Fri Mar 17 2000 - 12:47:57 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Larry Smith | Fri Mar 17 2000 - 12:56:31 PST |
[SI-LIST] : Fun With Stackups again | Lawrence Butcher | Fri Mar 17 2000 - 12:59:06 PST |
RE: [SI-LIST] : Bad IBIS models! | Muranyi, Arpad | Fri Mar 17 2000 - 13:03:39 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Larry Smith | Fri Mar 17 2000 - 13:05:02 PST |
RE: [SI-LIST] : GOOD IBIS models! | Haller, Robert | Fri Mar 17 2000 - 13:12:11 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Larry Smith | Fri Mar 17 2000 - 13:18:37 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Larry Smith | Fri Mar 17 2000 - 13:23:13 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Dennis Yarak | Fri Mar 17 2000 - 13:31:22 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | mjs | Fri Mar 17 2000 - 13:54:24 PST |
RE: [SI-LIST] : Fast edges with limited plane capacitance | Chris Cheng | Fri Mar 17 2000 - 15:07:35 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Paul Thompson | Fri Mar 17 2000 - 15:11:23 PST |
Re : [SI-LIST] : Bad IBIS models! | Chris Cheng | Fri Mar 17 2000 - 15:21:23 PST |
Re: [SI-LIST] : SI Software for EMC | Doug McKean | Fri Mar 17 2000 - 15:41:05 PST |
Re: [SI-LIST] : Bad IBIS models! - Business thoughts | Myra Torres | Fri Mar 17 2000 - 16:12:54 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Doug McKean | Fri Mar 17 2000 - 16:13:41 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | Vinu Arumugham | Fri Mar 17 2000 - 17:53:21 PST |
Re: [SI-LIST] : Fun With Stackups again | [email protected] | Sat Mar 18 2000 - 09:43:51 PST |
[SI-LIST] : Lossy line model | Alex March | Sat Mar 18 2000 - 11:04:59 PST |
[SI-LIST] : Spice to IBIS Converter | Basker | Sat Mar 18 2000 - 11:08:09 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Sat Mar 18 2000 - 12:25:58 PST |
[SI-LIST] : Catching the Corners | Abe Riazi | Sat Mar 18 2000 - 12:28:07 PST |
[SI-LIST] : Catching the Corners: chain of synchronizing registers | Shayle Hirschman | Sat Mar 18 2000 - 07:31:03 PST |
RE: [SI-LIST] : Bad IBIS models! | Abe Riazi | Sat Mar 18 2000 - 12:57:24 PST |
Re: [SI-LIST] : Catching the Corners: chain of synchronizing registers | S. Weir | Sun Mar 19 2000 - 02:41:15 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | S. Weir | Sun Mar 19 2000 - 03:00:55 PST |
RE: [SI-LIST] : Catching the Corners | Abe Riazi | Sun Mar 19 2000 - 10:43:25 PST |
[SI-LIST] : Unusual System Glitchs | Douglas C. Smith | Sun Mar 19 2000 - 20:27:17 PST |
[SI-LIST] : Daisy-Chain | Tham Kok Tong | Mon Mar 20 2000 - 00:26:41 PST |
Re: [SI-LIST] : Daisy-Chain | S. Weir | Mon Mar 20 2000 - 00:47:45 PST |
RE: [SI-LIST] : Lossy line model | Clewell, Craig W | Mon Mar 20 2000 - 05:46:26 PST |
Re: [SI-LIST] : Spice to IBIS Converter | Fethi Bellamine | Mon Mar 20 2000 - 06:27:05 PST |
[SI-LIST] : Toward better model data... | [email protected] | Mon Mar 20 2000 - 06:53:46 PST |
Re: [SI-LIST] : Daisy-Chain | Yu Wang | Mon Mar 20 2000 - 07:00:57 PST |
Re: [SI-LIST] : CDM and HDM models of | D. C. Sessions | Mon Mar 20 2000 - 07:00:42 PST |
Re: [SI-LIST] : Bad IBIS models! | D. C. Sessions | Mon Mar 20 2000 - 07:15:11 PST |
Re: [SI-LIST] : Bad IBIS models! | D. C. Sessions | Mon Mar 20 2000 - 07:23:02 PST |
RE: [SI-LIST] : Bad IBIS models! GREAT POINTS DC | LaFlamme, Peter | Mon Mar 20 2000 - 07:37:54 PST |
Re: [SI-LIST] : Catching the Corners: chain of synchronizingregisters | D. C. Sessions | Mon Mar 20 2000 - 08:16:24 PST |
RE: [SI-LIST] : Spice to IBIS Converter | Peters, Stephen | Mon Mar 20 2000 - 08:32:15 PST |
RE: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Mon Mar 20 2000 - 08:49:40 PST |
Re: [SI-LIST] : Spice to IBIS Converter | Fred Balistreri | Mon Mar 20 2000 - 08:39:28 PST |
[SI-LIST] : SI Society Chapter | Farrokh Mottahedin | Mon Mar 20 2000 - 08:54:46 PST |
[SI-LIST] : Signal Integrity Positions at AMD -- Austin, TX | Jonathan Dowling | Mon Mar 20 2000 - 09:09:19 PST |
Re: [SI-LIST] : SI Society Chapter | Istvan Novak - Board Design Technology | Mon Mar 20 2000 - 09:32:19 PST |
Re: [SI-LIST] : Daisy-Chain | Jeff Reeve | Mon Mar 20 2000 - 09:28:09 PST |
Re: [SI-LIST] : SI Society Chapter | Neven Pischl | Mon Mar 20 2000 - 09:42:12 PST |
Re: [SI-LIST] : SI Society Chapter | [email protected] | Mon Mar 20 2000 - 09:59:20 PST |
Re: [SI-LIST] : SI Society Chapter | Chris Padilla | Mon Mar 20 2000 - 10:10:19 PST |
RE: [SI-LIST] : SI Society Chapter | Denomme, Paul S. | Mon Mar 20 2000 - 10:46:11 PST |
RE: [SI-LIST] : SI Society Chapter | Greim, Michael | Mon Mar 20 2000 - 11:01:02 PST |
RE: [SI-LIST] : SI Society Chapter | Clewell, Craig W | Mon Mar 20 2000 - 11:15:16 PST |
Re: [SI-LIST] : SI Society Chapter | Eric B. Lewis | Mon Mar 20 2000 - 11:17:02 PST |
Re: [SI-LIST] : Daisy-Chain | Jim Freeman | Mon Mar 20 2000 - 11:22:21 PST |
Re: [SI-LIST] : SI Society Chapter | Muzahid Huda | Mon Mar 20 2000 - 11:25:26 PST |
RE: [SI-LIST] : SI Society Chapter | [email protected] | Mon Mar 20 2000 - 11:42:17 PST |
RE: [SI-LIST] : SI Society Chapter | zanella, fabrizio | Mon Mar 20 2000 - 11:48:31 PST |
RE: [SI-LIST] : SI Society Chapter | Patterson, Ken | Mon Mar 20 2000 - 11:51:49 PST |
RE: [SI-LIST] : SI Society Chapter | Ray Anderson | Mon Mar 20 2000 - 12:13:05 PST |
RE: [SI-LIST] : SI Society Chapter | Peters, Stephen | Mon Mar 20 2000 - 12:24:02 PST |
Re: [SI-LIST] : Daisy-Chain | S. Weir | Mon Mar 20 2000 - 12:44:52 PST |
Re: [SI-LIST] : Catching the Corners: chain of synchronizingregisters | S. Weir | Mon Mar 20 2000 - 12:51:16 PST |
Re: [SI-LIST] : SI Society Chapter | [email protected] | Mon Mar 20 2000 - 12:47:32 PST |
RE: [SI-LIST] : SI Society Chapter | [email protected] | Mon Mar 20 2000 - 12:49:04 PST |
RE: [SI-LIST] : SI Society Chapter | Denomme, Paul S. | Mon Mar 20 2000 - 12:50:38 PST |
[SI-LIST] : How to create IEEE SI Society Chapters ? | Ray Anderson | Mon Mar 20 2000 - 13:11:54 PST |
RE: [SI-LIST] : SI Society Chapter | S. Weir | Mon Mar 20 2000 - 13:35:48 PST |
Re: [SI-LIST] : SI Society Chapter | Kim Helliwell | Mon Mar 20 2000 - 14:15:58 PST |
Re: [SI-LIST] : SI Society Chapter | Lum Wee Mei | Mon Mar 20 2000 - 15:25:40 PST |
Re: [SI-LIST] : SI Society Chapter | Roy Leventhal | Mon Mar 20 2000 - 15:35:35 PST |
Re: [SI-LIST] : SI Society Chapter | Shawn X. Arnold | Mon Mar 20 2000 - 18:17:49 PST |
RE: [SI-LIST] : SI Society Chapter | Weber Chuang | Mon Mar 20 2000 - 18:28:13 PST |
RE: [SI-LIST] : SI Society Chapter | [email protected] | Mon Mar 20 2000 - 21:47:58 PST |
RE: [SI-LIST] : SI Society Chapter | Chang, Isaac Yew Beng | Mon Mar 20 2000 - 22:03:26 PST |
[SI-LIST] : how to combine multi components together with Orcad layout | Yu Wang | Tue Mar 21 2000 - 07:42:43 PST |
RE: [SI-LIST] : how to combine multi components together with Orc ad layout | Gaines, William | Tue Mar 21 2000 - 09:01:50 PST |
Re: [SI-LIST] : how to combine multi components together with Orcad layout | [email protected] | Tue Mar 21 2000 - 09:27:25 PST |
RE: [SI-LIST] : how to combine multi components together with Orc ad layout | Iulian Ungureanu | Tue Mar 21 2000 - 09:56:45 PST |
Re: [SI-LIST] : How to create IEEE SI Society Chapters ? | Hans Mellberg | Tue Mar 21 2000 - 11:05:28 PST |
[SI-LIST] : In search of other lists. | Norbert Seitz | Tue Mar 21 2000 - 11:44:29 PST |
[SI-LIST] : meaning and value of C_comp | Weston Beal | Tue Mar 21 2000 - 12:19:57 PST |
Re: [SI-LIST] : meaning and value of C_comp | D. C. Sessions | Tue Mar 21 2000 - 12:53:40 PST |
Re: [SI-LIST] : how to combine multi components together with Orcad layout | Giovanni DiBenedetto | Tue Mar 21 2000 - 13:24:53 PST |
Re: [SI-LIST] : Fast edges with limited plane capacitance | [email protected] | Tue Mar 21 2000 - 13:53:16 PST |
Re: [SI-LIST] : meaning and value of C_comp | [email protected] | Tue Mar 21 2000 - 14:13:11 PST |
[SI-LIST] : SI FAQ Proposal | Ray Anderson | Tue Mar 21 2000 - 16:17:01 PST |
Re: [SI-LIST] : SI FAQ Proposal | [email protected] | Tue Mar 21 2000 - 17:00:19 PST |
Re: [SI-LIST] : SI FAQ Proposal | Shannon Roseman | Tue Mar 21 2000 - 21:05:26 PST |
Re: [SI-LIST] : SI Society Chapter | Jeff | Tue Mar 21 2000 - 20:25:28 PST |
Re: [SI-LIST] : SI FAQ Proposal | Istvan NOVAK | Wed Mar 22 2000 - 05:19:51 PST |
Re: [SI-LIST] : meaning and value of C_comp | Mike LaBonte | Wed Mar 22 2000 - 06:09:46 PST |
Re: [SI-LIST] : SI FAQ Proposal | Andrew Phillips | Wed Mar 22 2000 - 06:23:15 PST |
[SI-LIST] : HSPICE Start Up conditions | Kai Keskinen | Wed Mar 22 2000 - 07:45:53 PST |
Re: [SI-LIST] : meaning and value of C_comp | D. C. Sessions | Wed Mar 22 2000 - 09:57:41 PST |
Re: [SI-LIST] : SI FAQ Proposal | Ray Anderson | Wed Mar 22 2000 - 10:36:06 PST |
Re: [SI-LIST] : In search of other lists. | Doug McKean | Wed Mar 22 2000 - 11:19:14 PST |
RE: [SI-LIST] : HSPICE Start Up conditions | Tom Dagostino | Wed Mar 22 2000 - 10:50:21 PST |
RE: [SI-LIST] : HSPICE Start Up conditions | Kai Keskinen | Wed Mar 22 2000 - 11:15:27 PST |
[SI-LIST] : EUROPEAN IBIS SUMMIT MEETING AGENDA | Bob Ross | Wed Mar 22 2000 - 11:51:00 PST |
Re: [SI-LIST] : HSPICE Start Up conditions | Umesh Painaik | Wed Mar 22 2000 - 12:16:32 PST |
RE: [SI-LIST] : HSPICE Start Up conditions | Ingraham, Andrew | Wed Mar 22 2000 - 12:42:52 PST |
Re: [SI-LIST] : Daisy-Chain | sweir | Wed Mar 22 2000 - 12:46:00 PST |
Re: [SI-LIST] : SI FAQ Proposal | D. C. Sessions | Wed Mar 22 2000 - 16:36:36 PST |
Re: [SI-LIST] : HSPICE Start Up conditions | Mike Jenkins | Wed Mar 22 2000 - 17:05:24 PST |
RE: [SI-LIST] : SI FAQ Proposal | Muranyi, Arpad | Wed Mar 22 2000 - 17:11:57 PST |
[SI-LIST] : IEEE SI Chapter Action Update | Ray Anderson | Sat Mar 18 2000 - 12:50:14 PST |
Re: [SI-LIST] : how to combine multi components together with Orcad layout | Jon Keeble | Wed Mar 22 2000 - 20:22:49 PST |
[SI-LIST] : Lab procedures for TDR | Kevin Dale Kirmse | Wed Mar 22 2000 - 21:13:23 PST |
AW: [SI-LIST] : Lab procedures for TDR | Ulrich Mussler | Thu Mar 23 2000 - 01:35:33 PST |
RE: [SI-LIST] : HSPICE Start Up conditions | Kai Keskinen | Thu Mar 23 2000 - 04:20:03 PST |
RE: [SI-LIST] : Lab procedures for TDR | Fasig, Jonathan L. | Thu Mar 23 2000 - 05:39:05 PST |
RE: [SI-LIST] : SI FAQ Proposal | Mayer, Mike | Thu Mar 23 2000 - 05:55:21 PST |
RE: [SI-LIST] : SI FAQ Proposal | Liang, Hongbo (Subsidiary) | Thu Mar 23 2000 - 06:26:05 PST |
[SI-LIST] : Number of GND/Power pins in a connector ? | Stuart Adams | Thu Mar 23 2000 - 07:43:19 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Fokken, Gregg J. | Thu Mar 23 2000 - 08:15:37 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | [email protected] | Thu Mar 23 2000 - 09:11:26 PST |
Re: [SI-LIST] : SI FAQ Proposal | Ritchey Lee | Thu Mar 23 2000 - 09:25:49 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Scott McMorrow | Thu Mar 23 2000 - 10:55:34 PST |
Re: [SI-LIST] : SI FAQ Proposal | D. C. Sessions | Thu Mar 23 2000 - 11:01:57 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Jim Freeman | Thu Mar 23 2000 - 13:15:07 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Stuart Adams | Thu Mar 23 2000 - 14:08:38 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Lum Wee Mei | Thu Mar 23 2000 - 15:18:50 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Jim Freeman | Thu Mar 23 2000 - 15:29:00 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Vinu Arumugham | Thu Mar 23 2000 - 16:27:07 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Jim Freeman | Thu Mar 23 2000 - 16:50:07 PST |
[SI-LIST] : EMC Issue - servo amplifier | Lum Wee Mei | Thu Mar 23 2000 - 19:08:27 PST |
[SI-LIST] : �ظ�: [SI-LIST] : SI Society Chapte | rachild.chen | Thu Mar 23 2000 - 23:39:57 PST |
Re: [SI-LIST] : SI FAQ Proposal | Andrew Phillips | Fri Mar 24 2000 - 06:30:52 PST |
Re: [SI-LIST] : how to combine multi components together with Orcad layout | Yu Wang | Fri Mar 24 2000 - 07:04:47 PST |
RE: [SI-LIST] : EMC Issue - servo amplifier | Gaines, William | Fri Mar 24 2000 - 07:40:02 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Gaines, William | Fri Mar 24 2000 - 08:28:44 PST |
Re: [SI-LIST] : Lab procedures for TDR | Bob Lewandowski | Fri Mar 24 2000 - 09:32:34 PST |
RE: [SI-LIST] : EUROPEAN IBIS SUMMIT MEETING AGENDA | Chris Hansen | Fri Mar 24 2000 - 09:36:54 PST |
Re: [SI-LIST] : Fun With Stackups again | Dan Irish | Fri Mar 24 2000 - 09:41:54 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Nerheim, Max | Fri Mar 24 2000 - 10:20:55 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Kai Keskinen | Fri Mar 24 2000 - 10:49:08 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Adrian Shiner | Fri Mar 24 2000 - 11:31:45 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Kai Keskinen | Fri Mar 24 2000 - 11:51:38 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Doug McKean | Fri Mar 24 2000 - 12:44:32 PST |
[SI-LIST] : Parallel Plate Capacitance for Bypass | Hansen, Chris | Fri Mar 24 2000 - 13:25:51 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Ron Miller | Fri Mar 24 2000 - 14:30:22 PST |
RE: [SI-LIST] : Parallel Plate Capacitance for Bypass | Knighten, Jim L | Fri Mar 24 2000 - 14:44:40 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Ray Anderson | Fri Mar 24 2000 - 14:46:54 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Chris Padilla | Fri Mar 24 2000 - 14:54:08 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Ray Anderson | Fri Mar 24 2000 - 15:13:56 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Chris Padilla | Fri Mar 24 2000 - 15:25:39 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Bob Lewandowski | Fri Mar 24 2000 - 15:32:19 PST |
Re: [SI-LIST] : EMC Issue - servo amplifier | Doug McKean | Fri Mar 24 2000 - 16:38:30 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | S. Weir | Fri Mar 24 2000 - 18:35:40 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | S. Weir | Fri Mar 24 2000 - 18:41:09 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | S. Weir | Fri Mar 24 2000 - 18:48:55 PST |
[SI-LIST] : Any buffer suggestions? | Robert Stuart | Sat Mar 25 2000 - 00:12:27 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Adrian Shiner | Sat Mar 25 2000 - 04:27:13 PST |
Re: [SI-LIST] : Any buffer suggestions? | S. Weir | Sat Mar 25 2000 - 15:45:55 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | S. Weir | Sat Mar 25 2000 - 15:52:18 PST |
Re: [SI-LIST] : Any buffer suggestions? | Yu Wang | Sat Mar 25 2000 - 20:08:21 PST |
[SI-LIST] : SPICE models for LVDS and LVPECL | Alex March | Sun Mar 26 2000 - 03:43:50 PST |
RE: [SI-LIST] : SPICE models for LVDS and LVPECL | P.R.Dewasthalee | Sun Mar 26 2000 - 05:39:03 PST |
Re: [SI-LIST] : SI FAQ Proposal | Istvan NOVAK | Sun Mar 26 2000 - 07:19:11 PST |
[SI-LIST] : Analog ground connection on PCBoards | Yehuda D. Yizraeli | Sun Mar 26 2000 - 07:40:05 PST |
Re: [SI-LIST] : Analog ground connection on PCBoards | Adrian Shiner | Sun Mar 26 2000 - 11:45:47 PST |
RE: [SI-LIST] : Rambus patent posturing - what gives? | X2Y ATTENUATORS, LLC. | Mon Mar 27 2000 - 02:58:38 PST |
RE: [SI-LIST] : Rambus patent posturing - what gives? | Tom Dagostino | Mon Mar 27 2000 - 03:17:38 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | [email protected] | Mon Mar 27 2000 - 05:57:04 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Rick Brooks | Mon Mar 27 2000 - 07:44:00 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Nerheim, Max | Mon Mar 27 2000 - 07:47:57 PST |
Re: [SI-LIST] : Analog ground connection on PCBoards | Dave Graves | Mon Mar 27 2000 - 10:22:26 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Ron Miller | Mon Mar 27 2000 - 10:39:10 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Jim Leng | Mon Mar 27 2000 - 10:41:31 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Gerald Johnson | Mon Mar 27 2000 - 11:01:33 PST |
Re: [SI-LIST] : Rambus patent posturing - what gives? | Adrian Shiner | Mon Mar 27 2000 - 11:13:36 PST |
RE: [SI-LIST] : Parallel Plate Capacitance for Bypass | Greim, Michael | Mon Mar 27 2000 - 11:23:28 PST |
Re: [SI-LIST] : Number of GND/Power pins in a connector ? | Adrian Shiner | Mon Mar 27 2000 - 11:25:54 PST |
RE: [SI-LIST] : Parallel Plate Capacitance for Bypass | S. Weir | Mon Mar 27 2000 - 12:01:18 PST |
RE: [SI-LIST] : Parallel Plate Capacitance for Bypass | Greim, Michael | Mon Mar 27 2000 - 12:13:22 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Larry Smith | Mon Mar 27 2000 - 17:05:14 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Ron Miller | Mon Mar 27 2000 - 19:32:34 PST |
RE: [SI-LIST] : Number of GND/Power pins in a connector ? | Bob Davis | Tue Mar 28 2000 - 00:06:04 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | [email protected] | Tue Mar 28 2000 - 07:36:15 PST |
[SI-LIST] : Spice Consultants? | Tony Sweeney | Tue Mar 28 2000 - 10:52:43 PST |
[SI-LIST] : Signal Integrity Eng. Job Openings at Cisco, RTP, NC | Stephen Hilla | Tue Mar 28 2000 - 10:55:09 PST |
RE: [SI-LIST] : Parallel Plate Capacitance for Bypass | Grasso, Charles (Chaz) | Tue Mar 28 2000 - 15:11:55 PST |
RE: [SI-LIST] : Parallel Plate Capacitance for Bypass | Doug Brooks | Wed Mar 29 2000 - 10:12:29 PST |
RE: [SI-LIST] : SPICE models for LVDS and LVPECL | Degerstrom, Michael J. | Wed Mar 29 2000 - 11:50:06 PST |
[SI-LIST] : SI Position available, Intel, Chandler - AZ | Nerheim, Max | Wed Mar 29 2000 - 12:10:10 PST |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Jerry Johnson | Wed Mar 29 2000 - 17:34:38 PST |
[SI-LIST] : Differential LVPECL termination | ramesh srinivasan | Thu Mar 30 2000 - 01:59:21 PST |
[SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | [email protected] | Thu Mar 30 2000 - 05:06:00 PST |
Re: [SI-LIST] : Differential LVPECL termination | Jim Freeman | Thu Mar 30 2000 - 13:16:13 PST |
RE: [SI-LIST] : Production test of 10/100 ethernet conn ?? | Farrokh Mottahedin | Thu Mar 30 2000 - 13:58:04 PST |
RE: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anes | Knighten, Jim L | Thu Mar 30 2000 - 13:59:16 PST |
[SI-LIST] : 0805 quad pack xtalk? | [email protected] | Thu Mar 30 2000 - 14:05:24 PST |
[SI-LIST] : Coax connection to a CPW guide | Guido Hunziker | Thu Mar 30 2000 - 14:08:14 PST |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | John Howard | Thu Mar 30 2000 - 06:39:57 PST |
[SI-LIST] : Return path for stripline, two ground planes or one power and one ground? | �L�·� | Thu Mar 30 2000 - 16:59:38 PST |
[SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | rachild.chen | Thu Mar 30 2000 - 19:43:45 PST |
[SI-LIST] : Signal Integrity Position | maher musa | Thu Mar 30 2000 - 20:33:45 PST |
[SI-LIST] : RE: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | [email protected] | Fri Mar 31 2000 - 01:04:34 PST |
RE: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground? | Dan Swanson | Fri Mar 31 2000 - 04:38:43 PST |
Re: [SI-LIST] : Coax connection to a CPW guide | Walt Kreiger | Fri Mar 31 2000 - 04:45:09 PST |
Re: [SI-LIST] : Signal Integrity Position | Roy Leventhal | Fri Mar 31 2000 - 05:33:34 PST |
Re: [SI-LIST] : Signal Integrity Position | maher musa | Fri Mar 31 2000 - 05:54:10 PST |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Harris, George | Fri Mar 31 2000 - 07:08:08 PST |
Re: [SI-LIST] : Coax connection to a CPW guide | Hans Mellberg | Fri Mar 31 2000 - 07:41:44 PST |
Re: [SI-LIST] : Signal Integrity Position | Kim Helliwell | Fri Mar 31 2000 - 07:54:30 PST |
[SI-LIST] : RE: [SI-LIST] : RE: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | Dave Hoover | Fri Mar 31 2000 - 08:10:02 PST |
RE: [SI-LIST] : Signal Integrity Position | Jones, Matthew S | Fri Mar 31 2000 - 08:15:22 PST |
[SI-LIST] : Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | Chris Padilla | Fri Mar 31 2000 - 08:11:56 PST |
Re: [SI-LIST] : Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | Joel Jorgenson | Fri Mar 31 2000 - 08:32:34 PST |
RE: [SI-LIST] : Signal Integrity Position | [email protected] | Fri Mar 31 2000 - 08:37:36 PST |
[SI-LIST] : Re: Signal Integrity Position | Laurence Michaels | Fri Mar 31 2000 - 11:14:45 PST |
[SI-LIST] : Re: [SI-LIST]: Parallel Plate Capacitance for Bypass (air breakdown) | Charles R. Patton | Fri Mar 31 2000 - 15:23:56 PST |
RE: [SI-LIST] : Coax connection to a CPW guide | Ray Waugh | Fri Mar 31 2000 - 15:29:53 PST |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | [email protected] | Fri Mar 31 2000 - 16:19:29 PST |
Re: [SI-LIST] : Coax connection to a CPW guide | [email protected] | Fri Mar 31 2000 - 16:22:07 PST |
Re: [SI-LIST] : Coax connection to a CPW guide | Mark Randol | Fri Mar 31 2000 - 16:24:42 PST |
[SI-LIST] : via capacitance | Sunil Kumar | Thu Mar 30 2000 - 21:34:00 PST |
Fw: [SI-LIST] : via capacitance | Jon Keeble | Fri Mar 31 2000 - 18:40:23 PST |
RE: [SI-LIST] : via capacitance | Dunbar, Tony | Sun Apr 02 2000 - 09:32:03 PDT |
Re: Fw: [SI-LIST] : via capacitance | Ray Anderson | Tue Mar 28 2000 - 00:17:53 PST |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Ingraham, Andrew | Sun Apr 02 2000 - 17:06:00 PDT |
[SI-LIST] : HSPICE Control card for simulations with inductors | Yehuda D. Yizraeli | Sun Apr 02 2000 - 22:21:12 PDT |
RE: [SI-LIST] : via capacitance | Dan Swanson | Mon Apr 03 2000 - 04:57:18 PDT |
RE: [SI-LIST] : Signal Integrity Position | Peterson, James F (FL51) | Mon Apr 03 2000 - 05:42:51 PDT |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Larry Smith | Mon Apr 03 2000 - 10:00:04 PDT |
[SI-LIST] : PLL clock buffer chips and the feedback loop | Andy Peters | Mon Apr 03 2000 - 11:06:06 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Patterson, Ken | Mon Apr 03 2000 - 11:35:01 PDT |
Re: [SI-LIST] : PLL clock buffer chips and the feedback loop | Arrigo Benedetti | Mon Apr 03 2000 - 11:47:07 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Chung, Sinh | Mon Apr 03 2000 - 12:05:27 PDT |
RE: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground? | Mark Nass | Mon Apr 03 2000 - 12:05:32 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Chung, Sinh | Mon Apr 03 2000 - 12:19:37 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planesor one power and one ground? | Scott McMorrow | Mon Apr 03 2000 - 14:01:37 PDT |
RE: [SI-LIST] : SI FAQ Proposal | Grasso, Charles (Chaz) | Tue Apr 04 2000 - 10:05:36 PDT |
Re: [SI-LIST] : EUROPEAN IBIS SUMMIT MEETING AGENDA | Bob Ross | Tue Apr 04 2000 - 10:53:51 PDT |
[SI-LIST] : Power Distribution Design | Hansen, Chris | Tue Apr 04 2000 - 10:57:20 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground? | Vinu Arumugham | Tue Apr 04 2000 - 11:57:25 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground? | Vinu Arumugham | Tue Apr 04 2000 - 12:10:55 PDT |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Chris Cheng | Tue Apr 04 2000 - 12:25:54 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Vinu Arumugham | Tue Apr 04 2000 - 12:45:51 PDT |
[SI-LIST] : Field solver | Kim Helliwell | Tue Apr 04 2000 - 15:04:58 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Larry Smith | Tue Apr 04 2000 - 15:09:03 PDT |
Re: [SI-LIST] : Field solver | Norbert Seitz | Tue Apr 04 2000 - 15:46:03 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or one power and one ground? | Vinu Arumugham | Tue Apr 04 2000 - 17:10:38 PDT |
[SI-LIST] : PWR/GND grid effect on EMI | Ilya Zaverukha | Tue Apr 04 2000 - 19:00:39 PDT |
Re: [SI-LIST] : PWR/GND grid effect on EMI in 2-layer board | Lawrence Butcher | Tue Apr 04 2000 - 20:04:13 PDT |
RE: [SI-LIST] : PWR/GND grid effect on EMI | Brent DeWitt | Tue Apr 04 2000 - 20:24:00 PDT |
Re: [SI-LIST] : PWR/GND grid effect on EMI | sweir | Tue Apr 04 2000 - 20:33:02 PDT |
RE: [SI-LIST] : PWR/GND grid effect on EMI | Brent DeWitt | Tue Apr 04 2000 - 20:43:21 PDT |
RE: [SI-LIST] : Field solver | Dan Swanson | Wed Apr 05 2000 - 04:52:27 PDT |
Re: [SI-LIST] : PWR/GND grid effect on EMI | [email protected] | Wed Apr 05 2000 - 08:39:45 PDT |
Re: [SI-LIST] : Field solver | Mike Ventham | Wed Apr 05 2000 - 09:01:40 PDT |
[SI-LIST] : Reflections on clock line | Tham Kok Tong | Wed Apr 05 2000 - 11:15:04 PDT |
[SI-LIST] : re: [SI-LiST]: PLL clock buffer chips and the feedback loop | Andy Peters | Wed Apr 05 2000 - 11:48:25 PDT |
RE: [SI-LIST] : re: [SI-LiST]: PLL clock buffer chips and the fee dback loop | John Draut | Wed Apr 05 2000 - 12:15:12 PDT |
RE: [SI-LIST] : Reflections on clock line | Harris, George | Wed Apr 05 2000 - 13:06:33 PDT |
Re: [SI-LIST] : Field solver | Arani Sinha | Wed Apr 05 2000 - 13:36:05 PDT |
[SI-LIST] : [SI-LIST] SI tools | Jeffrey J. Cook | Wed Apr 05 2000 - 13:42:17 PDT |
[SI-LIST] : Reflections on clock line | Bob Perlman | Wed Apr 05 2000 - 13:42:44 PDT |
RE: [SI-LIST] : [SI-LIST] SI tools | Dunbar, Tony | Wed Apr 05 2000 - 13:57:37 PDT |
Re: [SI-LIST] : [SI-LIST] SI tools | Lawrence Mirabal | Wed Apr 05 2000 - 14:17:01 PDT |
Re: [SI-LIST] : [SI-LIST] SI tools | Scott McMorrow | Wed Apr 05 2000 - 14:23:35 PDT |
[SI-LIST] : Summer intern position | Matt Kaufmann | Wed Apr 05 2000 - 14:36:24 PDT |
RE: [SI-LIST] : [SI-LIST] SI tools | Chris Cheng | Wed Apr 05 2000 - 15:13:53 PDT |
RE: [SI-LIST] : Field solver | Chris Cheng | Wed Apr 05 2000 - 15:32:04 PDT |
RE: [SI-LIST] : [SI-LIST] SI tools | Doug Brooks | Wed Apr 05 2000 - 15:08:06 PDT |
Re: [SI-LIST] : re: [SI-LiST]: PLL clock buffer chips and the feedback loop | Yu Wang | Wed Apr 05 2000 - 21:09:46 PDT |
Re: [SI-LIST] : Reflections on clock line | Tadashi ARAI | Thu Apr 06 2000 - 04:37:39 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Ingraham, Andrew | Thu Apr 06 2000 - 05:08:54 PDT |
Re: [SI-LIST] : SI FAQ Proposal | Andrew Phillips | Thu Apr 06 2000 - 06:26:06 PDT |
[SI-LIST] : Decoupling strategy on 622MHz devices | Steeve Gaudreault | Thu Apr 06 2000 - 10:19:21 PDT |
[SI-LIST] : Low Inductance | [email protected] | Thu Apr 06 2000 - 10:38:10 PDT |
RE: [SI-LIST] : Decoupling strategy on 622MHz devices | Chris Cheng | Thu Apr 06 2000 - 11:41:18 PDT |
Re: [SI-LIST] : Reflections on clock line | Vinu Arumugham | Thu Apr 06 2000 - 11:50:21 PDT |
[SI-LIST] : a good SI/Layout book | Chung, Sinh | Thu Apr 06 2000 - 12:05:36 PDT |
Re: [SI-LIST] : a good SI/Layout book | Ray Anderson | Thu Apr 06 2000 - 12:26:38 PDT |
Re: [SI-LIST] : a good SI/Layout book | Peter Luu | Thu Apr 06 2000 - 12:29:57 PDT |
RE: [SI-LIST] : a good SI/Layout book | Lisa Desandoli | Thu Apr 06 2000 - 12:26:52 PDT |
Re: [SI-LIST] : Low Inductance | Larry Miller | Thu Apr 06 2000 - 11:46:13 PDT |
RE: [SI-LIST] : a good SI/Layout book | Clewell, Craig W | Thu Apr 06 2000 - 13:15:31 PDT |
Re: [SI-LIST] : a good SI/Layout book | [email protected] | Thu Apr 06 2000 - 13:27:46 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Andy Peters | Thu Apr 06 2000 - 13:25:02 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Lynne Green | Thu Apr 06 2000 - 13:50:59 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Peters, Stephen | Thu Apr 06 2000 - 14:16:21 PDT |
RE: [SI-LIST] : PLL clock buffer chips and the feedback loop | Andy Peters | Thu Apr 06 2000 - 14:58:35 PDT |
[SI-LIST] : routing problems | [email protected] | Thu Apr 06 2000 - 16:42:37 PDT |
Re: [SI-LIST] : Decoupling strategy on 622MHz devices | D. C. Sessions | Thu Apr 06 2000 - 17:49:46 PDT |
Re: [SI-LIST] : PLL clock buffer chips and the feedback loop | Rengarajan S Krishnan | Fri Apr 07 2000 - 09:11:09 PDT |
[SI-LIST] : Pwr/Gnd Noise | zhoujun | Fri Apr 07 2000 - 09:18:14 PDT |
[SI-LIST] : ViPEC (Touchstone QPL clone) | Ray Anderson | Fri Apr 07 2000 - 10:13:27 PDT |
[SI-LIST] : Terminator location with larger BGA's | [email protected] | Fri Apr 07 2000 - 13:16:31 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Vinu Arumugham | Fri Apr 07 2000 - 13:37:59 PDT |
[SI-LIST] : BLVDS Hot Swap | Steve Ash | Fri Apr 07 2000 - 14:56:10 PDT |
RE: [SI-LIST] : Terminator location with larger BGA's | Ron Miller | Fri Apr 07 2000 - 15:34:41 PDT |
RE: [SI-LIST] : Terminator location with larger BGA's | Chris Cheng | Fri Apr 07 2000 - 15:45:38 PDT |
Re: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Larry Smith | Fri Apr 07 2000 - 15:54:10 PDT |
Re: [SI-LIST] : Terminator location with larger BGA's | Scott McMorrow | Fri Apr 07 2000 - 16:24:20 PDT |
Re: [SI-LIST] : Terminator location with larger BGA's | D. C. Sessions | Fri Apr 07 2000 - 16:56:13 PDT |
Re: [SI-LIST] : Terminator location with larger BGA's | Scott McMorrow | Fri Apr 07 2000 - 18:00:22 PDT |
Re: [SI-LIST] : Terminator location with larger BGA's | Bob Lewandowski | Fri Apr 07 2000 - 18:52:17 PDT |
Re: [SI-LIST] : Terminator location with larger BGA's | Scott McMorrow | Fri Apr 07 2000 - 18:51:35 PDT |
Re: [SI-LIST] : Terminator location with larger BGA's | Scott McMorrow | Sat Apr 08 2000 - 23:42:36 PDT |
[SI-LIST] : Printer Port | Peter Baxter | Sun Apr 09 2000 - 15:23:25 PDT |
Re: [SI-LIST] : Printer Port | S. Weir | Sun Apr 09 2000 - 18:11:37 PDT |
[SI-LIST] : ESD evenyt counter | Jan Vercammen | Mon Apr 10 2000 - 05:55:46 PDT |
Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | Ritchey Lee | Mon Apr 10 2000 - 09:13:04 PDT |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Tom Dagostino | Mon Apr 10 2000 - 09:17:48 PDT |
Re: [SI-LIST] : via capacitance | Ritchey Lee | Mon Apr 10 2000 - 09:15:36 PDT |
RE: [SI-LIST] : Printer Port | Volk, Andrew M | Mon Apr 10 2000 - 09:15:36 PDT |
Re: Fw: [SI-LIST] : via capacitance | Ritchey Lee | Mon Apr 10 2000 - 09:21:14 PDT |
RE: [SI-LIST] : ESD evenyt counter | Farrokh Mottahedin | Mon Apr 10 2000 - 10:06:21 PDT |
Re: Fw: [SI-LIST] : via capacitance | [email protected] | Mon Apr 10 2000 - 11:50:55 PDT |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of PowerPlanes | Dr. Edward P. Sayre | Mon Apr 10 2000 - 11:19:21 PDT |
RE: [SI-LIST] : via capacitance | Ron Miller | Mon Apr 10 2000 - 13:40:27 PDT |
Re: Fw: [SI-LIST] : via capacitance | [email protected] | Mon Apr 10 2000 - 15:58:22 PDT |
RE: [SI-LIST] : Hatch | Dave Hoover | Mon Apr 10 2000 - 16:48:22 PDT |
Re: [SI-LIST] : via capacitance | apanella | Mon Apr 10 2000 - 20:46:40 PDT |
Re: [SI-LIST] : ESD evenyt counter | Douglas C. Smith | Mon Apr 10 2000 - 23:14:30 PDT |
Re: [SI-LIST] : via capacitance | Scott McMorrow | Tue Apr 11 2000 - 08:00:45 PDT |
[SI-LIST] : Bulk Caps -> Inductor? -> Plane | mjs | Tue Apr 11 2000 - 11:58:33 PDT |
[SI-LIST] : Hi Mr. Peters, I'm sorry that you foind our applications notes so confusing. If you can point out some of the specific areas of ambiguity we will attempt to correct them. With respect to your specific question below, i.e., where do you bring the feedback from, this is actually quite simple. You bring it from which ever pin you want to to achieve the multiply or divide ratio you want. The CY7B991 does not have a fixed output for feedback requirements. This can come from any output pin, and can even come from an external divider. The selection of a feedback output path to use is documented in a number of application notes available from http://www.cypress.com/clock/appnotes.html Regards, Ed Grivna Cypress Semiconductor Data Communications Division > From: "Andy Peters" <[email protected]> > To: <[email protected]> > Subject: [SI-LIST] : PLL clock buffer chips and the feedback loop > Date: Mon, 3 Apr 2000 11:06:06 -0700 > MIME-Version: 1.0 > Content-Transfer-Encoding: 7bit > X-Priority: 3 (Normal) > X-MSMail-Priority: Normal > X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 > Importance: Normal > > When using "zero-skew" PLL clock buffer chips (such as the Cypress > RoboClock), where do you bring the feedback from? Cypress' data sheets and > app notes are notoriously (and typically, I might add) unclear on this - > they simply indicate that it comes from "one of the outputs." > > For instance, my board has an FPGA that talks to four SDRAM devices. It > seems to me that one buffer output could drive the FPGA's clock pin (via > series termination) and four of the other outputs could drive the four SDRAM > clocks (again, through series terminations). Assume that my clock line > lengths are equal, to minimize board skew. Do I take the feedback from one > of the destination pins, and match the line length? Or is it sufficient to > simply connect one of the outputs to the feedback pin right at the chip? > > Are there any other vendors of these sorts of devices? Spread-spectrum > capability is not required. > > thanks, > > -andy > > ps: I sent a short e-mail to the sales-droids at Accel, asking some simple > questions about their signal integrity tool. Since they were apparently too > busy to bother replying, I am no longer considering their product. > > ----------------------------------------- > Andy Peters > Sr Electrical Engineer > National Optical Astronomy Observatories > 950 N Cherry Ave > Tucson, AZ 85719 > 520 318 8191 > [email protected] > > "Money is property; it is not speech." > -- Justice John Paul Stevens > > > **** To unsubscribe from si-list or si-list-digest: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HERe: [SI-LIST] : PLL clock buffer chips and the feedback loop | Ed Grivna | Tue Apr 11 2000 - 12:32:37 PDT |
[SI-LIST] : IBIS question regards [Falling Waveform] / [Rising Waveform]. | Merav Kass | Tue Apr 11 2000 - 12:35:28 PDT |
[SI-LIST] : BLVDS Hot Swap | Francis Chiu | Tue Apr 11 2000 - 12:37:48 PDT |
RE: [SI-LIST] : BLVDS Hot Swap | Steve Ash | Tue Apr 11 2000 - 13:29:39 PDT |
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | Nick Dietz | Tue Apr 11 2000 - 13:44:34 PDT |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | Larry Smith | Tue Apr 11 2000 - 14:12:29 PDT |
RE: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | Tom Dagostino | Tue Apr 11 2000 - 14:13:36 PDT |
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | [email protected] | Tue Apr 11 2000 - 14:35:12 PDT |
RE: [SI-LIST] : IBIS question regards [Falling Waveform] / [Rising Waveform]. | Chris Rokusek | Tue Apr 11 2000 - 15:02:07 PDT |
RE: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | mjs | Tue Apr 11 2000 - 15:01:06 PDT |
RE: [SI-LIST] : IBIS question regards [Falling Waveform] / [Risin g Waveform]. | Peters, Stephen | Tue Apr 11 2000 - 15:13:42 PDT |
RE: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | Ingraham, Andrew | Tue Apr 11 2000 - 15:38:52 PDT |
RE: [SI-LIST] : BLVDS Hot Swap | Francis Chiu | Tue Apr 11 2000 - 15:46:47 PDT |
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | sweir | Tue Apr 11 2000 - 17:33:32 PDT |
Re: [SI-LIST] : �ظ�: [SI-LIST] : Parallel Plate Capacitance for Bypass | e | Wed Apr 12 2000 - 02:12:36 PDT |
Re: [SI-LIST] : Parallel Plate Capacitance for Bypass | Andrew Phillips | Wed Apr 12 2000 - 02:27:08 PDT |
[SI-LIST] : 18 layer stackup question | e | Wed Apr 12 2000 - 02:36:47 PDT |
[SI-LIST] : Plane Modeling for big power board plane | Chang, Isaac Yew Beng | Wed Apr 12 2000 - 03:09:09 PDT |
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | [email protected] | Tue Apr 11 2000 - 13:53:23 PDT |
[SI-LIST] : Information on FR-4 and other PCB dielectric materials | [email protected] | Wed Apr 12 2000 - 06:24:34 PDT |
Re: [SI-LIST] : �ظ� [SI-LIST] : Parallel Plate Capacitance for Bypass | [email protected] | Wed Apr 12 2000 - 09:27:33 PDT |
Re: [SI-LIST] : 18 layer stackup question | Dave Hoover | Wed Apr 12 2000 - 09:51:37 PDT |
Re: [SI-LIST] : 18 layer stackup question | sweir | Wed Apr 12 2000 - 12:52:20 PDT |
[SI-LIST] : on-chip decoupling capacitance | [email protected] | Wed Apr 12 2000 - 13:26:00 PDT |
RE: [SI-LIST] : Return path for stripline, two ground planes or o ne power and one ground? | [email protected] | Wed Apr 12 2000 - 05:33:16 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance | bgrossma | Wed Apr 12 2000 - 16:43:23 PDT |
Re: [SI-LIST] : Reflections on clock line | Tham Kok Tong | Wed Apr 12 2000 - 17:49:19 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance | Jan Vercammen | Thu Apr 13 2000 - 04:01:18 PDT |
[SI-LIST] : board-level simulation for differential signals | Daniel Wei | Thu Apr 13 2000 - 04:45:28 PDT |
[SI-LIST] : digital display interface | [email protected] | Thu Apr 13 2000 - 08:19:42 PDT |
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | Yu Wang | Thu Apr 13 2000 - 08:15:58 PDT |
RE: [SI-LIST] : board-level simulation for differential signals | Weston Beal | Thu Apr 13 2000 - 09:23:32 PDT |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | Scott McMorrow | Thu Apr 13 2000 - 10:48:15 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance | D. C. Sessions | Thu Apr 13 2000 - 11:16:44 PDT |
RE: [SI-LIST] : board-level simulation for differential signals | Marc Humphreys | Thu Apr 13 2000 - 11:56:28 PDT |
[SI-LIST] : 20-H Rule disclosure | Ray Anderson | Thu Apr 13 2000 - 11:58:44 PDT |
RE: [SI-LIST] : 20-H Rule disclosure | Chan, Michael | Thu Apr 13 2000 - 13:11:32 PDT |
[SI-LIST] : �^��: [SI-LIST] : board-level simulation or differential signal | Daniel Wei | Thu Apr 13 2000 - 19:24:16 PDT |
RE: [SI-LIST] : board-level simulation for differential signals | Weber Chuang | Thu Apr 13 2000 - 20:04:10 PDT |
RE: [SI-LIST] : board-level simulation for differential signals | Daniel Wei | Fri Apr 14 2000 - 00:08:37 PDT |
Re: [SI-LIST] : Bulk Caps -> Inductor? -> Plane | Silvio ORSI | Fri Apr 14 2000 - 08:33:06 PDT |
[SI-LIST] : Signal Integrity AE for Xilinx | Vern Dunbrack | Fri Apr 14 2000 - 12:33:04 PDT |
[SI-LIST] : App note assumptions | Mark Geddes | Fri Apr 14 2000 - 12:31:34 PDT |
Re: [SI-LIST] : App note assumptions | Ray Anderson | Fri Apr 14 2000 - 13:05:08 PDT |
[SI-LIST] : BLVDS Hot Swap - Connectors | DAmbrosia, John F | Fri Apr 14 2000 - 13:18:39 PDT |
RE: [SI-LIST] : App note assumptions | Chris Cheng | Fri Apr 14 2000 - 13:29:17 PDT |
[SI-LIST] : Dielectric Material Comparison | Lisa Desandoli | Fri Apr 14 2000 - 14:40:37 PDT |
Re: [SI-LIST] : Dielectric Material Comparison | Fred Rosenberger | Fri Apr 14 2000 - 15:07:14 PDT |
RE: [SI-LIST] : Dielectric Material Comparison | Mark Geddes | Fri Apr 14 2000 - 15:32:21 PDT |
Re: [SI-LIST] : BLVDS Hot Swap - Connectors | Francis Chiu | Fri Apr 14 2000 - 16:27:52 PDT |
Re: [SI-LIST] : App note assumptions | S. Weir | Sat Apr 15 2000 - 00:55:13 PDT |
Re: [SI-LIST] : board-level simulation for differential signals | ARiazi | Sat Apr 15 2000 - 07:33:00 PDT |
Re: [SI-LIST] : App note assumptions | Michael Schmitt | Mon Apr 17 2000 - 00:07:38 PDT |
RE: [SI-LIST] : Dielectric Material Comparison | Clewell, Craig W | Mon Apr 17 2000 - 05:25:26 PDT |
RE: [SI-LIST] : board-level simulation for differential signals | Marc Humphreys | Mon Apr 17 2000 - 06:35:54 PDT |
RE: [SI-LIST] : App note assumptions | Mark Geddes | Mon Apr 17 2000 - 07:53:57 PDT |
[SI-LIST] : IBIS for SSTL_2 | Ronnen Lovinger | Mon Apr 17 2000 - 08:31:46 PDT |
[SI-LIST] : AC Coupling vs DC Coupling | Bryan Robb | Mon Apr 17 2000 - 09:45:25 PDT |
[SI-LIST] : Question on propagation delay........ | Greim, Michael | Mon Apr 17 2000 - 10:14:56 PDT |
Re: [SI-LIST] : IBIS for SSTL_2 | D. C. Sessions | Mon Apr 17 2000 - 10:14:58 PDT |
Re: [SI-LIST] : AC Coupling vs DC Coupling | Scott McMorrow | Mon Apr 17 2000 - 10:31:08 PDT |
Re: [SI-LIST] : IBIS for SSTL_2 | Scott McMorrow | Mon Apr 17 2000 - 10:36:31 PDT |
Re: [SI-LIST] : Question on propagation delay........ | Istvan Novak - Board Design Technology | Mon Apr 17 2000 - 11:09:19 PDT |
[SI-LIST] : App Notes & Papers | Lynne Green | Mon Apr 17 2000 - 11:23:39 PDT |
[SI-LIST] : RE: App Notes & Papers | Lynne Green | Mon Apr 17 2000 - 11:30:06 PDT |
Re: [SI-LIST] : Question on propagation delay........ | Steve Corey | Mon Apr 17 2000 - 11:53:04 PDT |
RE: [SI-LIST] : AC Coupling vs DC Coupling | Greim, Michael | Mon Apr 17 2000 - 12:14:40 PDT |
RE: [SI-LIST] : Question on propagation delay........ | Ingraham, Andrew | Mon Apr 17 2000 - 12:37:50 PDT |
RE: [SI-LIST] : AC Coupling vs DC Coupling | Farrokh Mottahedin | Mon Apr 17 2000 - 12:36:29 PDT |
[SI-LIST] : anybody fielding newbie questions?? | Robison Michael R CNIN | Mon Apr 17 2000 - 13:13:01 PDT |
RE: [SI-LIST] : Dielectric Material Comparison | Norman Ebsary | Mon Apr 17 2000 - 13:16:56 PDT |
Re: [SI-LIST] : anybody fielding newbie questions?? | Dave Hoover | Mon Apr 17 2000 - 13:33:27 PDT |
Re: [SI-LIST] : anybody fielding newbie questions?? | [email protected] | Mon Apr 17 2000 - 14:45:25 PDT |
RE: [SI-LIST] : anybody fielding newbie questions?? | Peters, Stephen | Mon Apr 17 2000 - 13:52:06 PDT |
[SI-LIST] : HSPICE Vector File Problem | Bradley S Henson | Mon Apr 17 2000 - 14:09:31 PDT |
Re: [SI-LIST] : Question on propagation delay........ | Mike Jenkins | Mon Apr 17 2000 - 14:26:26 PDT |
RE: [SI-LIST] : AC Coupling vs DC Coupling | S. Weir | Mon Apr 17 2000 - 14:35:16 PDT |
RE: [SI-LIST] : HSPICE Vector File Problem | Muranyi, Arpad | Mon Apr 17 2000 - 14:28:34 PDT |
Re: [SI-LIST] : AC Coupling vs DC Coupling | Scott McMorrow | Mon Apr 17 2000 - 14:36:36 PDT |
Re: [SI-LIST] : anybody fielding newbie questions?? | Eric Anderson | Mon Apr 17 2000 - 15:12:42 PDT |
Re: [SI-LIST] : AC Coupling vs DC Coupling | Tony Sweeney | Mon Apr 17 2000 - 15:37:33 PDT |
RE: [SI-LIST] : HSPICE Vector File Problem | Bradley S Henson | Mon Apr 17 2000 - 16:15:28 PDT |
Re: [SI-LIST] : board-level simulation for differential signals | Jonathan Dowling | Mon Apr 17 2000 - 17:11:19 PDT |
RE: [SI-LIST] : AC Coupling vs DC Coupling | Degerstrom, Michael J. | Mon Apr 17 2000 - 19:13:23 PDT |
Re: [SI-LIST] : AC Coupling vs DC Coupling | Josip Popovic | Tue Apr 18 2000 - 04:57:50 PDT |
Re: [SI-LIST] : Dielectric Material Comparison | [email protected] | Tue Apr 18 2000 - 07:38:30 PDT |
Re: [SI-LIST] : AC Coupling vs DC Coupling | D. C. Sessions | Tue Apr 18 2000 - 10:24:57 PDT |
RE: [SI-LIST] : AC Coupling vs DC Coupling | Chris Cheng | Tue Apr 18 2000 - 13:25:26 PDT |
[SI-LIST] : on-chip decoupling capacitance (and SI) | Sandy Taylor | Tue Apr 18 2000 - 16:29:03 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance (and SI) | D. C. Sessions | Tue Apr 18 2000 - 16:51:44 PDT |
Re: [SI-LIST] : AC Coupling vs DC Coupling | D. C. Sessions | Tue Apr 18 2000 - 17:41:05 PDT |
RE: [SI-LIST] : on-chip decoupling capacitance (and SI) | Zabinski, Patrick J. | Wed Apr 19 2000 - 04:46:15 PDT |
[SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | Mary | Wed Apr 19 2000 - 09:45:12 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance (and SI) | D. C. Sessions | Wed Apr 19 2000 - 10:55:51 PDT |
RE: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anes | Nadolny, Jim | Wed Apr 19 2000 - 11:05:34 PDT |
RE: [SI-LIST] : on-chip decoupling capacitance (and SI) | Zabinski, Patrick J. | Wed Apr 19 2000 - 11:40:18 PDT |
[SI-LIST] : Friendly reminder about message formatting | Richard A. Schumacher | Wed Apr 19 2000 - 11:58:14 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance (and SI) | D. C. Sessions | Wed Apr 19 2000 - 11:57:41 PDT |
Re: [SI-LIST] : Friendly reminder about message formatting | Ray Anderson | Wed Apr 19 2000 - 12:21:27 PDT |
RE: [SI-LIST] : on-chip decoupling capacitance (and SI) | Chris Cheng | Wed Apr 19 2000 - 12:29:04 PDT |
Re: [SI-LIST] : on-chip decoupling capacitance (and SI) | D. C. Sessions | Wed Apr 19 2000 - 13:00:28 PDT |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anes | [email protected] | Wed Apr 19 2000 - 15:49:25 PDT |
RE: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | Chris Rokusek | Wed Apr 19 2000 - 16:37:58 PDT |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Pl anes | [email protected] | Thu Apr 20 2000 - 10:33:01 PDT |
[SI-LIST] : differential impedance | Sean Murray | Thu Apr 20 2000 - 11:18:31 PDT |
Re: [SI-LIST] : 20-H Rule and Self-Resonant Frequency of Power Planes | Ray Anderson | Thu Apr 20 2000 - 11:06:20 PDT |
[SI-LIST] : SI position at Intel Folsom, CA | Muranyi, Arpad | Thu Apr 20 2000 - 11:12:59 PDT |