;  LST file generated by mikroListExporter - v.2.0 
; Date/Time: 10/12/2012 12:03:48
;----------------------------------------------

;Address Opcode 	ASM
0x0000	0x31B8      	MOVLP      56
0x0001	0x2D40      	GOTO       15680
_main:
;boot_loader_1938_8.mbas,48 :: 		org  boot_main
;boot_loader_1938_8.mbas,53 :: 		OSCCON = %01110000         'set osc to no PLL,  8MHz,   Int clock
0x3D40	0x3070      	MOVLW      112
0x3D41	0x0021      	MOVLB      1
0x3D42	0x0099      	MOVWF      OSCCON
;boot_loader_1938_8.mbas,54 :: 		Uart_Begin()               'must set up Uart for bootloader to work
0x3D43	0x2764      	CALL       _Uart_Begin
;boot_loader_1938_8.mbas,57 :: 		if (Usart_Write_Loop("g","r") = 255) then
0x3D44	0x3067      	MOVLW      103
0x3D45	0x0020      	MOVLB      0
0x3D46	0x00ED      	MOVWF      FARG_Usart_Write_Loop_send
0x3D47	0x3072      	MOVLW      114
0x3D48	0x00EE      	MOVWF      FARG_Usart_Write_Loop_receive
0x3D49	0x271B      	CALL       _Usart_Write_Loop
0x3D4A	0x0870      	MOVF       R0, 0
0x3D4B	0x3AFF      	XORLW      255
0x3D4C	0x1D03      	BTFSS      STATUS, 2
0x3D4D	0x2D50      	GOTO       L__main2
;boot_loader_1938_8.mbas,61 :: 		start_program()                         'start user's program
0x3D4E	0x27F8      	CALL       16376
0x3D4F	0x2D51      	GOTO       L__main3
;boot_loader_1938_8.mbas,66 :: 		else                                'if "r" is received then
L__main2:
;boot_loader_1938_8.mbas,68 :: 		start_bootload()                'start bootload
0x3D50	0x276D      	CALL       _Start_Bootload
;boot_loader_1938_8.mbas,69 :: 		end if
L__main3:
L_end_main:
0x3D51	0x2D51      	GOTO       $+0
; end of _main
bootfor16_E2_Erase_Prog:
;bootfor16_E2.mbas,70 :: 		Sub procedure Erase_Prog()    'only called by program routine, so local to module
;bootfor16_E2.mbas,71 :: 		EEADRL = lo(uadd)
0x3D52	0x0020      	MOVLB      0
0x3D53	0x0861      	MOVF       bootfor16_E2_uadd, 0
0x3D54	0x0023      	MOVLB      3
0x3D55	0x0091      	MOVWF      EEADRL
;bootfor16_E2.mbas,72 :: 		EEADRH = hi(uadd)
0x3D56	0x0020      	MOVLB      0
0x3D57	0x0862      	MOVF       bootfor16_E2_uadd+1, 0
0x3D58	0x0023      	MOVLB      3
0x3D59	0x0092      	MOVWF      EEADRH
;bootfor16_E2.mbas,73 :: 		setbit   (EECON1,EEPGD)
0x3D5A	0x1795      	BSF        EECON1, 7
;bootfor16_E2.mbas,74 :: 		ClearBit (EECON1,CFGS)
0x3D5B	0x1315      	BCF        EECON1, 6
;bootfor16_E2.mbas,75 :: 		SetBit   (EECON1,FREE)   'tells uC to clear 32 words from address above
0x3D5C	0x1615      	BSF        EECON1, 4
;bootfor16_E2.mbas,76 :: 		SetBit   (EECON1,WREN)
0x3D5D	0x1515      	BSF        EECON1, 2
;bootfor16_E2.mbas,77 :: 		EECON2 = 0x55
0x3D5E	0x3055      	MOVLW      85
0x3D5F	0x0096      	MOVWF      EECON2
;bootfor16_E2.mbas,78 :: 		EECON2 = 0XAA
0x3D60	0x30AA      	MOVLW      170
0x3D61	0x0096      	MOVWF      EECON2
;bootfor16_E2.mbas,79 :: 		SetBit (EECON1,WR)        'start erase of 32 words
0x3D62	0x1495      	BSF        EECON1, 1
;bootfor16_E2.mbas,80 :: 		nop
0x3D63	0x0000      	NOP
;bootfor16_E2.mbas,81 :: 		nop
0x3D64	0x0000      	NOP
;bootfor16_E2.mbas,82 :: 		while EECON1.FREE         'FREE is cleared by HW at end of erase
L_bootfor16_E2_Erase_Prog3:
0x3D65	0x1A15      	BTFSC      EECON1, 4
0x3D66	0x2D65      	GOTO       L_bootfor16_E2_Erase_Prog3
;bootfor16_E2.mbas,84 :: 		end sub
L_end_Erase_Prog:
0x3D67	0x0008      	RETURN
; end of bootfor16_E2_Erase_Prog
bootfor16_E2_Write_Prog:
;bootfor16_E2.mbas,87 :: 		dim i as byte 'local i, no relation to any other i
;bootfor16_E2.mbas,93 :: 		intsave = INTCON             'save for restore later
0x3D68	0x080B      	MOVF       INTCON, 0
0x3D69	0x0020      	MOVLB      0
0x3D6A	0x00E0      	MOVWF      bootfor16_E2_intsave
;bootfor16_E2.mbas,94 :: 		clearbit (INTCON,GIE)        'stop any ints for now, restore at end of programming
0x3D6B	0x138B      	BCF        INTCON, 7
;bootfor16_E2.mbas,95 :: 		uadd = madd <<5              'shift page to get true address
0x3D6C	0x3005      	MOVLW      5
0x3D6D	0x00F0      	MOVWF      R0
0x3D6E	0x0022      	MOVLB      2
0x3D6F	0x0820      	MOVF       FARG_Write_Prog_madd, 0
0x3D70	0x0020      	MOVLB      0
0x3D71	0x00E1      	MOVWF      bootfor16_E2_uadd
0x3D72	0x0022      	MOVLB      2
0x3D73	0x0821      	MOVF       FARG_Write_Prog_madd+1, 0
0x3D74	0x0020      	MOVLB      0
0x3D75	0x00E2      	MOVWF      bootfor16_E2_uadd+1
0x3D76	0x0870      	MOVF       R0, 0
L_bootfor16_E2_Write_Prog80:
0x3D77	0x1903      	BTFSC      STATUS, 2
0x3D78	0x2D7D      	GOTO       L_bootfor16_E2_Write_Prog81
0x3D79	0x35E1      	LSLF       bootfor16_E2_uadd, 1
0x3D7A	0x0DE2      	RLF        bootfor16_E2_uadd+1, 1
0x3D7B	0x3EFF      	ADDLW      255
0x3D7C	0x2D77      	GOTO       L_bootfor16_E2_Write_Prog80
L_bootfor16_E2_Write_Prog81:
;bootfor16_E2.mbas,96 :: 		Erase_Prog()                 'do erase
0x3D7D	0x2552      	CALL       bootfor16_E2_Erase_Prog
;bootfor16_E2.mbas,98 :: 		for i = 0 to 31                'do it 32 times
0x3D7E	0x0022      	MOVLB      2
0x3D7F	0x01A2      	CLRF       Write_Prog_i
L_bootfor16_E2_Write_Prog9:
;bootfor16_E2.mbas,99 :: 		EEADRL =  lo(uadd + i)     'get lower address byte (0-7)
0x3D80	0x0822      	MOVF       Write_Prog_i, 0
0x3D81	0x0020      	MOVLB      0
0x3D82	0x0761      	ADDWF      bootfor16_E2_uadd, 0
0x3D83	0x00F0      	MOVWF      R0
0x3D84	0x3000      	MOVLW      0
0x3D85	0x3D62      	ADDWFC     bootfor16_E2_uadd+1, 0
0x3D86	0x00F1      	MOVWF      R1
0x3D87	0x0870      	MOVF       R0, 0
0x3D88	0x0023      	MOVLB      3
0x3D89	0x0091      	MOVWF      EEADRL
;bootfor16_E2.mbas,100 :: 		EEADRH =  hi(uadd)         'get higher address byte (8-14)
0x3D8A	0x0020      	MOVLB      0
0x3D8B	0x0862      	MOVF       bootfor16_E2_uadd+1, 0
0x3D8C	0x0023      	MOVLB      3
0x3D8D	0x0092      	MOVWF      EEADRH
;bootfor16_E2.mbas,101 :: 		EEDATL =  lo(Block[i])     'get lower data byte
0x3D8E	0x0022      	MOVLB      2
0x3D8F	0x0822      	MOVF       Write_Prog_i, 0
0x3D90	0x00F0      	MOVWF      R0
0x3D91	0x01F1      	CLRF       R1
0x3D92	0x35F0      	LSLF       R0, 1
0x3D93	0x0DF1      	RLF        R1, 1
0x3D94	0x3020      	MOVLW      bootfor16_E2_block
0x3D95	0x0770      	ADDWF      R0, 0
0x3D96	0x0084      	MOVWF      FSR0
0x3D97	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3D98	0x3D71      	ADDWFC     R1, 0
0x3D99	0x0085      	MOVWF      FSR0H
0x3D9A	0x0800      	MOVF       INDF0, 0
0x3D9B	0x0023      	MOVLB      3
0x3D9C	0x0093      	MOVWF      EEDATL
;bootfor16_E2.mbas,102 :: 		EEDATH =  hi(Block[i])     'get higher data byte (8-15)
0x3D9D	0x3020      	MOVLW      bootfor16_E2_block
0x3D9E	0x07F0      	ADDWF      R0, 1
0x3D9F	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3DA0	0x3DF1      	ADDWFC     R1, 1
0x3DA1	0x3001      	MOVLW      1
0x3DA2	0x0770      	ADDWF      R0, 0
0x3DA3	0x0084      	MOVWF      FSR0
0x3DA4	0x3000      	MOVLW      0
0x3DA5	0x3D71      	ADDWFC     R1, 0
0x3DA6	0x0085      	MOVWF      FSR0H
0x3DA7	0x0800      	MOVF       INDF0, 0
0x3DA8	0x0094      	MOVWF      EEDATH
;bootfor16_E2.mbas,103 :: 		setbit   (EECON1,EEPGD)    'EEPROM area
0x3DA9	0x1795      	BSF        EECON1, 7
;bootfor16_E2.mbas,104 :: 		ClearBit (EECON1,CFGS)     'Not CONFIG area
0x3DAA	0x1315      	BCF        EECON1, 6
;bootfor16_E2.mbas,105 :: 		SetBit   (EECON1,LWLO)     'Set to write to latches
0x3DAB	0x1695      	BSF        EECON1, 5
;bootfor16_E2.mbas,106 :: 		SetBit   (EECON1,WREN)     'Enable writes
0x3DAC	0x1515      	BSF        EECON1, 2
;bootfor16_E2.mbas,110 :: 		case 7,15,23,31  clearBit(EECON1, LWLO)  'clear to write to memory
0x3DAD	0x0022      	MOVLB      2
0x3DAE	0x0822      	MOVF       Write_Prog_i, 0
0x3DAF	0x3A07      	XORLW      7
0x3DB0	0x1D03      	BTFSS      STATUS, 2
0x3DB1	0x2DB3      	GOTO       L_bootfor16_E2_Write_Prog16
0x3DB2	0x2DC1      	GOTO       L_bootfor16_E2_Write_Prog14
L_bootfor16_E2_Write_Prog16:
0x3DB3	0x0822      	MOVF       Write_Prog_i, 0
0x3DB4	0x3A0F      	XORLW      15
0x3DB5	0x1D03      	BTFSS      STATUS, 2
0x3DB6	0x2DB8      	GOTO       L_bootfor16_E2_Write_Prog17
0x3DB7	0x2DC1      	GOTO       L_bootfor16_E2_Write_Prog14
L_bootfor16_E2_Write_Prog17:
0x3DB8	0x0822      	MOVF       Write_Prog_i, 0
0x3DB9	0x3A17      	XORLW      23
0x3DBA	0x1D03      	BTFSS      STATUS, 2
0x3DBB	0x2DBD      	GOTO       L_bootfor16_E2_Write_Prog18
0x3DBC	0x2DC1      	GOTO       L_bootfor16_E2_Write_Prog14
L_bootfor16_E2_Write_Prog18:
0x3DBD	0x0822      	MOVF       Write_Prog_i, 0
0x3DBE	0x3A1F      	XORLW      31
0x3DBF	0x1D03      	BTFSS      STATUS, 2
0x3DC0	0x2DC4      	GOTO       L_bootfor16_E2_Write_Prog19
L_bootfor16_E2_Write_Prog14:
0x3DC1	0x0023      	MOVLB      3
0x3DC2	0x1295      	BCF        EECON1, 5
0x3DC3	0x2DC4      	GOTO       L_bootfor16_E2_Write_Prog13
L_bootfor16_E2_Write_Prog19:
L_bootfor16_E2_Write_Prog13:
0x3DC4	0x0023      	MOVLB      3
;bootfor16_E2.mbas,113 :: 		EECON2 = 0x55          'EEPROM write sequence
0x3DC5	0x3055      	MOVLW      85
0x3DC6	0x0096      	MOVWF      EECON2
;bootfor16_E2.mbas,114 :: 		EECON2 = 0XAA
0x3DC7	0x30AA      	MOVLW      170
0x3DC8	0x0096      	MOVWF      EECON2
;bootfor16_E2.mbas,115 :: 		SetBit (EECON1,WR)     'start write to latch if LWLO = 1 or memory if LWL = 0
0x3DC9	0x1495      	BSF        EECON1, 1
;bootfor16_E2.mbas,116 :: 		nop                    'stops at first nop, uC suspends everything until write is done
0x3DCA	0x0000      	NOP
;bootfor16_E2.mbas,117 :: 		nop
0x3DCB	0x0000      	NOP
;bootfor16_E2.mbas,118 :: 		while EECON1.WR        'belt & braces check of WR bit, cleared by HW at end of prog
L_bootfor16_E2_Write_Prog21:
0x3DCC	0x1895      	BTFSC      EECON1, 1
0x3DCD	0x2DCC      	GOTO       L_bootfor16_E2_Write_Prog21
;bootfor16_E2.mbas,121 :: 		next i                     'do for all 32 words in store
0x3DCE	0x0022      	MOVLB      2
0x3DCF	0x0822      	MOVF       Write_Prog_i, 0
0x3DD0	0x3A1F      	XORLW      31
0x3DD1	0x1903      	BTFSC      STATUS, 2
0x3DD2	0x2DD5      	GOTO       L_bootfor16_E2_Write_Prog12
0x3DD3	0x0AA2      	INCF       Write_Prog_i, 1
0x3DD4	0x2D80      	GOTO       L_bootfor16_E2_Write_Prog9
L_bootfor16_E2_Write_Prog12:
;bootfor16_E2.mbas,123 :: 		ClearBit (EECON1,WREN)        'no more EEPROM writes now
0x3DD5	0x0023      	MOVLB      3
0x3DD6	0x1115      	BCF        EECON1, 2
;bootfor16_E2.mbas,124 :: 		INTCON = intsave              'restore intcon
0x3DD7	0x0020      	MOVLB      0
0x3DD8	0x0860      	MOVF       bootfor16_E2_intsave, 0
0x3DD9	0x008B      	MOVWF      INTCON
;bootfor16_E2.mbas,125 :: 		end sub
L_end_Write_Prog:
0x3DDA	0x0008      	RETURN
; end of bootfor16_E2_Write_Prog
_FLASH_Read:
;__Lib_FLASH_rwe.mpas,13 :: 		
;__Lib_FLASH_rwe.mpas,14 :: 		
0x3DDB	0x01F3      	CLRF       R3
0x3DDC	0x01F4      	CLRF       R3+1
;__Lib_FLASH_rwe.mpas,15 :: 		
0x3DDD	0x0022      	MOVLB      2
0x3DDE	0x0820      	MOVF       FARG_FLASH_Read_address, 0
0x3DDF	0x0023      	MOVLB      3
0x3DE0	0x0091      	MOVWF      EEADR
0x3DE1	0x0192      	CLRF       EEADR+1
;__Lib_FLASH_rwe.mpas,16 :: 		
0x3DE2	0x0022      	MOVLB      2
0x3DE3	0x0821      	MOVF       FARG_FLASH_Read_address+1, 0
0x3DE4	0x0023      	MOVLB      3
0x3DE5	0x0092      	MOVWF      EEADRH
;__Lib_FLASH_rwe.mpas,17 :: 		
0x3DE6	0x1315      	BCF        EECON1, 6
;__Lib_FLASH_rwe.mpas,18 :: 		
0x3DE7	0x1795      	BSF        EECON1, 7
;__Lib_FLASH_rwe.mpas,19 :: 		
0x3DE8	0x1415      	BSF        EECON1, 0
;__Lib_FLASH_rwe.mpas,20 :: 		
0x3DE9	0x0000      	NOP
;__Lib_FLASH_rwe.mpas,21 :: 		
0x3DEA	0x0000      	NOP
;__Lib_FLASH_rwe.mpas,22 :: 		
0x3DEB	0x0814      	MOVF       EEDATH, 0
0x3DEC	0x00F1      	MOVWF      R1
0x3DED	0x01F0      	CLRF       R0
0x3DEE	0x0870      	MOVF       R0, 0
0x3DEF	0x00F3      	MOVWF      R3
0x3DF0	0x0871      	MOVF       R1, 0
0x3DF1	0x00F4      	MOVWF      R3+1
;__Lib_FLASH_rwe.mpas,23 :: 		
0x3DF2	0x0813      	MOVF       EEDATL, 0
0x3DF3	0x04F3      	IORWF       R3, 1
0x3DF4	0x3000      	MOVLW      0
0x3DF5	0x04F4      	IORWF       R3+1, 1
;__Lib_FLASH_rwe.mpas,24 :: 		
0x3DF6	0x0873      	MOVF       R3, 0
0x3DF7	0x00F0      	MOVWF      R0
0x3DF8	0x0874      	MOVF       R3+1, 0
0x3DF9	0x00F1      	MOVWF      R1
L_end_FLASH_Read:
0x3DFA	0x0008      	RETURN
; end of _FLASH_Read
_UART1_Write:
;__Lib_UART_c67.mpas,81 :: 		
;__Lib_UART_c67.mpas,82 :: 		
L__UART1_Write14:
0x3DFB	0x0023      	MOVLB      3
0x3DFC	0x189E      	BTFSC      TXSTA, 1
0x3DFD	0x2E00      	GOTO       L__UART1_Write15
0x3DFE	0x0000      	NOP
0x3DFF	0x2DFB      	GOTO       L__UART1_Write14
L__UART1_Write15:
;__Lib_UART_c67.mpas,83 :: 		
0x3E00	0x0022      	MOVLB      2
0x3E01	0x0820      	MOVF       FARG_UART1_Write_data_, 0
0x3E02	0x0023      	MOVLB      3
0x3E03	0x009A      	MOVWF      TXREG
;__Lib_UART_c67.mpas,84 :: 		
L_end_UART1_Write:
0x3E04	0x0008      	RETURN
; end of _UART1_Write
_R485_Set:
;RS485_E.mbas,18 :: 		sub procedure R485_Set
;RS485_E.mbas,19 :: 		rts = 0    'set to receive (default)
0x3E05	0x0020      	MOVLB      0
0x3E06	0x100E      	BCF        RC0_bit, 0
;RS485_E.mbas,20 :: 		rtz = 0
0x3E07	0x0021      	MOVLB      1
0x3E08	0x100E      	BCF        TRISC0_bit, 0
;RS485_E.mbas,21 :: 		end sub
L_end_R485_Set:
0x3E09	0x0008      	RETURN
; end of _R485_Set
_UART1_Init:
;__Lib_UART_c67.mpas,34 :: 		
;__Lib_UART_c67.mpas,36 :: 		
0x3E0A	0x30FB      	MOVLW      _UART1_Write
0x3E0B	0x0021      	MOVLB      1
0x3E0C	0x00A8      	MOVWF      _UART_Wr_Ptr
0x3E0D	0x303D      	MOVLW      hi_addr(_UART1_Write)
0x3E0E	0x00A9      	MOVWF      _UART_Wr_Ptr+1
0x3E0F	0x3020      	MOVLW      FARG_UART1_Write_data_
0x3E10	0x00AA      	MOVWF      _UART_Wr_Ptr+2
0x3E11	0x3001      	MOVLW      hi_addr(FARG_UART1_Write_data_)
0x3E12	0x00AB      	MOVWF      _UART_Wr_Ptr+3
;__Lib_UART_c67.mpas,37 :: 		
0x3E13	0x300F      	MOVLW      _UART1_Read
0x3E14	0x0020      	MOVLB      0
0x3E15	0x00E9      	MOVWF      _UART_Rd_Ptr
0x3E16	0x303F      	MOVLW      hi_addr(_UART1_Read)
0x3E17	0x00EA      	MOVWF      _UART_Rd_Ptr+1
0x3E18	0x3000      	MOVLW      0
0x3E19	0x00EB      	MOVWF      _UART_Rd_Ptr+2
0x3E1A	0x3000      	MOVLW      0
0x3E1B	0x00EC      	MOVWF      _UART_Rd_Ptr+3
;__Lib_UART_c67.mpas,38 :: 		
0x3E1C	0x3007      	MOVLW      _UART1_Data_Ready
0x3E1D	0x0021      	MOVLB      1
0x3E1E	0x00A0      	MOVWF      _UART_Rdy_Ptr
0x3E1F	0x303F      	MOVLW      hi_addr(_UART1_Data_Ready)
0x3E20	0x00A1      	MOVWF      _UART_Rdy_Ptr+1
0x3E21	0x3000      	MOVLW      0
0x3E22	0x00A2      	MOVWF      _UART_Rdy_Ptr+2
0x3E23	0x3000      	MOVLW      0
0x3E24	0x00A3      	MOVWF      _UART_Rdy_Ptr+3
;__Lib_UART_c67.mpas,39 :: 		
0x3E25	0x30FF      	MOVLW      _UART1_TX_Idle
0x3E26	0x00A4      	MOVWF      _UART_TX_Idle_Ptr
0x3E27	0x30FF      	MOVLW      hi_addr(_UART1_TX_Idle)
0x3E28	0x00A5      	MOVWF      _UART_TX_Idle_Ptr+1
0x3E29	0x3000      	MOVLW      0
0x3E2A	0x00A6      	MOVWF      _UART_TX_Idle_Ptr+2
0x3E2B	0x3000      	MOVLW      0
0x3E2C	0x00A7      	MOVWF      _UART_TX_Idle_Ptr+3
;__Lib_UART_c67.mpas,41 :: 		
0x3E2D	0x0023      	MOVLB      3
0x3E2E	0x169E      	BSF        TXSTA, 5
;__Lib_UART_c67.mpas,42 :: 		
0x3E2F	0x3090      	MOVLW      144
0x3E30	0x009D      	MOVWF      RCSTA
;__Lib_UART_c67.mpas,43 :: 		
0x3E31	0x0021      	MOVLB      1
0x3E32	0x178E      	BSF        TRISC7_bit, 7
;__Lib_UART_c67.mpas,44 :: 		
0x3E33	0x130E      	BCF        TRISC6_bit, 6
;__Lib_UART_c67.mpas,45 :: 		
L__UART1_Init2:
0x3E34	0x0020      	MOVLB      0
0x3E35	0x1E91      	BTFSS      PIR1, 5
0x3E36	0x2E3B      	GOTO       L__UART1_Init3
;__Lib_UART_c67.mpas,46 :: 		
0x3E37	0x0023      	MOVLB      3
0x3E38	0x0819      	MOVF       RCREG, 0
0x3E39	0x00F0      	MOVWF      R0
0x3E3A	0x2E34      	GOTO       L__UART1_Init2
L__UART1_Init3:
;__Lib_UART_c67.mpas,47 :: 		
L_end_UART1_Init:
0x3E3B	0x0008      	RETURN
; end of _UART1_Init
_uw:
;RS485_E.mbas,30 :: 		Sub procedure uw(dim in as char)   'Writes single character via RS485 half duplex
;RS485_E.mbas,32 :: 		rts = 1               'portc.5 = 1
0x3E3C	0x0020      	MOVLB      0
0x3E3D	0x140E      	BSF        RC0_bit, 0
;RS485_E.mbas,34 :: 		uart1_write(in)
0x3E3E	0x0021      	MOVLB      1
0x3E3F	0x082F      	MOVF       FARG_uw_in, 0
0x3E40	0x0022      	MOVLB      2
0x3E41	0x00A0      	MOVWF      FARG_UART1_Write_data_
0x3E42	0x25FB      	CALL       _UART1_Write
;RS485_E.mbas,36 :: 		do
L__uw3:
;RS485_E.mbas,37 :: 		loop until TXSTA.TRMT = 1 'wait for tx reg empty before switching port
0x3E43	0x1C9E      	BTFSS      TXSTA, 1
0x3E44	0x2E43      	GOTO       L__uw3
;RS485_E.mbas,38 :: 		rts = 0                    'portc.5 = 0
0x3E45	0x0020      	MOVLB      0
0x3E46	0x100E      	BCF        RC0_bit, 0
;RS485_E.mbas,40 :: 		end sub
L_end_uw:
0x3E47	0x0008      	RETURN
; end of _uw
bootfor16_E2_Write_Begin:
;bootfor16_E2.mbas,172 :: 		dim i as byte                    'local counter
;bootfor16_E2.mbas,173 :: 		topm = (__FLASH_SIZE - 32)     'locates the top 32 bytes of Program ROM
0x3E48	0x30E0      	MOVLW      224
0x3E49	0x0020      	MOVLB      0
0x3E4A	0x00E3      	MOVWF      bootfor16_E2_topm
0x3E4B	0x303F      	MOVLW      63
0x3E4C	0x00E4      	MOVWF      bootfor16_E2_topm+1
;bootfor16_E2.mbas,174 :: 		rcv_1 = Flash_Read(0x0000)     'original page setting
0x3E4D	0x0022      	MOVLB      2
0x3E4E	0x01A0      	CLRF       FARG_FLASH_Read_address
0x3E4F	0x01A1      	CLRF       FARG_FLASH_Read_address+1
0x3E50	0x25DB      	CALL       _FLASH_Read
0x3E51	0x0870      	MOVF       R0, 0
0x3E52	0x0020      	MOVLB      0
0x3E53	0x00E5      	MOVWF      bootfor16_E2_rcv_1
0x3E54	0x0871      	MOVF       R1, 0
0x3E55	0x00E6      	MOVWF      bootfor16_E2_rcv_1+1
;bootfor16_E2.mbas,175 :: 		rcv_2 = Flash_read(0x0001)     'original goto main for bootloader
0x3E56	0x3001      	MOVLW      1
0x3E57	0x0022      	MOVLB      2
0x3E58	0x00A0      	MOVWF      FARG_FLASH_Read_address
0x3E59	0x01A1      	CLRF       FARG_FLASH_Read_address+1
0x3E5A	0x25DB      	CALL       _FLASH_Read
0x3E5B	0x0870      	MOVF       R0, 0
0x3E5C	0x0020      	MOVLB      0
0x3E5D	0x00E7      	MOVWF      bootfor16_E2_rcv_2
0x3E5E	0x0871      	MOVF       R1, 0
0x3E5F	0x00E8      	MOVWF      bootfor16_E2_rcv_2+1
;bootfor16_E2.mbas,176 :: 		for i = 0 to 31
0x3E60	0x0021      	MOVLB      1
0x3E61	0x01EF      	CLRF       Write_Begin_i
L_bootfor16_E2_Write_Begin41:
;bootfor16_E2.mbas,177 :: 		psave[i] = block[i]         'save 32 words, replace with NOPS
0x3E62	0x30AF      	MOVLW      Write_Begin_psave
0x3E63	0x00F3      	MOVWF      R3
0x3E64	0x3000      	MOVLW      hi_addr(Write_Begin_psave)
0x3E65	0x00F4      	MOVWF      R4
0x3E66	0x086F      	MOVF       Write_Begin_i, 0
0x3E67	0x00F0      	MOVWF      R0
0x3E68	0x01F1      	CLRF       R1
0x3E69	0x35F0      	LSLF       R0, 1
0x3E6A	0x0DF1      	RLF        R1, 1
0x3E6B	0x0870      	MOVF       R0, 0
0x3E6C	0x0773      	ADDWF      R3, 0
0x3E6D	0x0086      	MOVWF      FSR1
0x3E6E	0x0871      	MOVF       R1, 0
0x3E6F	0x3D74      	ADDWFC     R4, 0
0x3E70	0x0087      	MOVWF      FSR1H
0x3E71	0x3020      	MOVLW      bootfor16_E2_block
0x3E72	0x0770      	ADDWF      R0, 0
0x3E73	0x0084      	MOVWF      FSR0
0x3E74	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3E75	0x3D71      	ADDWFC     R1, 0
0x3E76	0x0085      	MOVWF      FSR0H
0x3E77	0x0800      	MOVF       INDF0, 0
0x3E78	0x0081      	MOVWF      INDF1
0x3E79	0x3101      	ADDFSR     0, 1
0x3E7A	0x0800      	MOVF       INDF0, 0
0x3E7B	0x3141      	ADDFSR     1, 1
0x3E7C	0x0081      	MOVWF      INDF1
;bootfor16_E2.mbas,178 :: 		block[i] = 0x0000
0x3E7D	0x086F      	MOVF       Write_Begin_i, 0
0x3E7E	0x00F0      	MOVWF      R0
0x3E7F	0x01F1      	CLRF       R1
0x3E80	0x35F0      	LSLF       R0, 1
0x3E81	0x0DF1      	RLF        R1, 1
0x3E82	0x3020      	MOVLW      bootfor16_E2_block
0x3E83	0x0770      	ADDWF      R0, 0
0x3E84	0x0086      	MOVWF      FSR1
0x3E85	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3E86	0x3D71      	ADDWFC     R1, 0
0x3E87	0x0087      	MOVWF      FSR1H
0x3E88	0x0181      	CLRF       INDF1
0x3E89	0x3141      	ADDFSR     1, 1
0x3E8A	0x0181      	CLRF       INDF1
;bootfor16_E2.mbas,179 :: 		next i
0x3E8B	0x086F      	MOVF       Write_Begin_i, 0
0x3E8C	0x3A1F      	XORLW      31
0x3E8D	0x1903      	BTFSC      STATUS, 2
0x3E8E	0x2E91      	GOTO       L_bootfor16_E2_Write_Begin44
0x3E8F	0x0AEF      	INCF       Write_Begin_i, 1
0x3E90	0x2E62      	GOTO       L_bootfor16_E2_Write_Begin41
L_bootfor16_E2_Write_Begin44:
;bootfor16_E2.mbas,184 :: 		block[24] = 0x3180          ' Movlp 0x000 Pclath to get to page 00
0x3E91	0x3080      	MOVLW      128
0x3E92	0x0020      	MOVLB      0
0x3E93	0x00D0      	MOVWF      bootfor16_E2_block+48
0x3E94	0x3031      	MOVLW      49
0x3E95	0x00D1      	MOVWF      bootfor16_E2_block+49
;bootfor16_E2.mbas,185 :: 		for i = 0 to 4
0x3E96	0x0021      	MOVLB      1
0x3E97	0x01EF      	CLRF       Write_Begin_i
L_bootfor16_E2_Write_Begin46:
;bootfor16_E2.mbas,186 :: 		block[i + 25] = psave[i] 'will include GOTO and any other instructions from
0x3E98	0x3019      	MOVLW      25
0x3E99	0x076F      	ADDWF      Write_Begin_i, 0
0x3E9A	0x00F3      	MOVWF      R3
0x3E9B	0x0873      	MOVF       R3, 0
0x3E9C	0x00F0      	MOVWF      R0
0x3E9D	0x01F1      	CLRF       R1
0x3E9E	0x35F0      	LSLF       R0, 1
0x3E9F	0x0DF1      	RLF        R1, 1
0x3EA0	0x3020      	MOVLW      bootfor16_E2_block
0x3EA1	0x0770      	ADDWF      R0, 0
0x3EA2	0x0086      	MOVWF      FSR1
0x3EA3	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3EA4	0x3D71      	ADDWFC     R1, 0
0x3EA5	0x0087      	MOVWF      FSR1H
0x3EA6	0x30AF      	MOVLW      Write_Begin_psave
0x3EA7	0x00F3      	MOVWF      R3
0x3EA8	0x3000      	MOVLW      hi_addr(Write_Begin_psave)
0x3EA9	0x00F4      	MOVWF      R4
0x3EAA	0x086F      	MOVF       Write_Begin_i, 0
0x3EAB	0x00F0      	MOVWF      R0
0x3EAC	0x01F1      	CLRF       R1
0x3EAD	0x35F0      	LSLF       R0, 1
0x3EAE	0x0DF1      	RLF        R1, 1
0x3EAF	0x0870      	MOVF       R0, 0
0x3EB0	0x0773      	ADDWF      R3, 0
0x3EB1	0x0084      	MOVWF      FSR0
0x3EB2	0x0871      	MOVF       R1, 0
0x3EB3	0x3D74      	ADDWFC     R4, 0
0x3EB4	0x0085      	MOVWF      FSR0H
0x3EB5	0x0800      	MOVF       INDF0, 0
0x3EB6	0x0081      	MOVWF      INDF1
0x3EB7	0x3101      	ADDFSR     0, 1
0x3EB8	0x0800      	MOVF       INDF0, 0
0x3EB9	0x3141      	ADDFSR     1, 1
0x3EBA	0x0081      	MOVWF      INDF1
;bootfor16_E2.mbas,187 :: 		next i                      'original program below 0x0005
0x3EBB	0x086F      	MOVF       Write_Begin_i, 0
0x3EBC	0x3A04      	XORLW      4
0x3EBD	0x1903      	BTFSC      STATUS, 2
0x3EBE	0x2EC1      	GOTO       L_bootfor16_E2_Write_Begin49
0x3EBF	0x0AEF      	INCF       Write_Begin_i, 1
0x3EC0	0x2E98      	GOTO       L_bootfor16_E2_Write_Begin46
L_bootfor16_E2_Write_Begin49:
;bootfor16_E2.mbas,188 :: 		block[29] = 0x0000
0x3EC1	0x0020      	MOVLB      0
0x3EC2	0x01DA      	CLRF       bootfor16_E2_block+58
0x3EC3	0x01DB      	CLRF       bootfor16_E2_block+59
;bootfor16_E2.mbas,189 :: 		block[30] = 0x0000
0x3EC4	0x01DC      	CLRF       bootfor16_E2_block+60
0x3EC5	0x01DD      	CLRF       bootfor16_E2_block+61
;bootfor16_E2.mbas,190 :: 		block[31] = 0x0008        'now have data to write in Block [0-31]
0x3EC6	0x3008      	MOVLW      8
0x3EC7	0x00DE      	MOVWF      bootfor16_E2_block+62
0x3EC8	0x01DF      	CLRF       bootfor16_E2_block+63
;bootfor16_E2.mbas,192 :: 		Write_prog (topm >>5)        'overwrites the top 32 words of ROM
0x3EC9	0x3005      	MOVLW      5
0x3ECA	0x00F0      	MOVWF      R0
0x3ECB	0x0863      	MOVF       bootfor16_E2_topm, 0
0x3ECC	0x0022      	MOVLB      2
0x3ECD	0x00A0      	MOVWF      FARG_Write_Prog_madd
0x3ECE	0x0020      	MOVLB      0
0x3ECF	0x0864      	MOVF       bootfor16_E2_topm+1, 0
0x3ED0	0x0022      	MOVLB      2
0x3ED1	0x00A1      	MOVWF      FARG_Write_Prog_madd+1
0x3ED2	0x0870      	MOVF       R0, 0
L_bootfor16_E2_Write_Begin84:
0x3ED3	0x1903      	BTFSC      STATUS, 2
0x3ED4	0x2ED9      	GOTO       L_bootfor16_E2_Write_Begin85
0x3ED5	0x36A1      	LSRF       FARG_Write_Prog_madd+1, 1
0x3ED6	0x0CA0      	RRF        FARG_Write_Prog_madd, 1
0x3ED7	0x3EFF      	ADDLW      255
0x3ED8	0x2ED3      	GOTO       L_bootfor16_E2_Write_Begin84
L_bootfor16_E2_Write_Begin85:
0x3ED9	0x2568      	CALL       bootfor16_E2_Write_Prog
;bootfor16_E2.mbas,193 :: 		Block[0] = rcv_1  'restore original page + goto boot_main
0x3EDA	0x0865      	MOVF       bootfor16_E2_rcv_1, 0
0x3EDB	0x00A0      	MOVWF      bootfor16_E2_block
0x3EDC	0x0866      	MOVF       bootfor16_E2_rcv_1+1, 0
0x3EDD	0x00A1      	MOVWF      bootfor16_E2_block+1
;bootfor16_E2.mbas,194 :: 		block[1] = rcv_2  'from orginal bootloader program data
0x3EDE	0x0867      	MOVF       bootfor16_E2_rcv_2, 0
0x3EDF	0x00A2      	MOVWF      bootfor16_E2_block+2
0x3EE0	0x0868      	MOVF       bootfor16_E2_rcv_2+1, 0
0x3EE1	0x00A3      	MOVWF      bootfor16_E2_block+3
;bootfor16_E2.mbas,196 :: 		for i = 2 to 31
0x3EE2	0x3002      	MOVLW      2
0x3EE3	0x0021      	MOVLB      1
0x3EE4	0x00EF      	MOVWF      Write_Begin_i
L_bootfor16_E2_Write_Begin51:
;bootfor16_E2.mbas,197 :: 		block[i]  = psave[i]         'restore program data except 0 & 1
0x3EE5	0x086F      	MOVF       Write_Begin_i, 0
0x3EE6	0x00F2      	MOVWF      R2
0x3EE7	0x01F3      	CLRF       R3
0x3EE8	0x35F2      	LSLF       R2, 1
0x3EE9	0x0DF3      	RLF        R3, 1
0x3EEA	0x3020      	MOVLW      bootfor16_E2_block
0x3EEB	0x0772      	ADDWF      R2, 0
0x3EEC	0x0086      	MOVWF      FSR1
0x3EED	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3EEE	0x3D73      	ADDWFC     R3, 0
0x3EEF	0x0087      	MOVWF      FSR1H
0x3EF0	0x30AF      	MOVLW      Write_Begin_psave
0x3EF1	0x00F0      	MOVWF      R0
0x3EF2	0x3000      	MOVLW      hi_addr(Write_Begin_psave)
0x3EF3	0x00F1      	MOVWF      R1
0x3EF4	0x0872      	MOVF       R2, 0
0x3EF5	0x0770      	ADDWF      R0, 0
0x3EF6	0x0084      	MOVWF      FSR0
0x3EF7	0x0873      	MOVF       R3, 0
0x3EF8	0x3D71      	ADDWFC     R1, 0
0x3EF9	0x0085      	MOVWF      FSR0H
0x3EFA	0x0800      	MOVF       INDF0, 0
0x3EFB	0x0081      	MOVWF      INDF1
0x3EFC	0x3101      	ADDFSR     0, 1
0x3EFD	0x0800      	MOVF       INDF0, 0
0x3EFE	0x3141      	ADDFSR     1, 1
0x3EFF	0x0081      	MOVWF      INDF1
;bootfor16_E2.mbas,198 :: 		next i
0x3F00	0x086F      	MOVF       Write_Begin_i, 0
0x3F01	0x3A1F      	XORLW      31
0x3F02	0x1903      	BTFSC      STATUS, 2
0x3F03	0x2F06      	GOTO       L_bootfor16_E2_Write_Begin54
0x3F04	0x0AEF      	INCF       Write_Begin_i, 1
0x3F05	0x2EE5      	GOTO       L_bootfor16_E2_Write_Begin51
L_bootfor16_E2_Write_Begin54:
;bootfor16_E2.mbas,199 :: 		end sub
L_end_Write_Begin:
0x3F06	0x0008      	RETURN
; end of bootfor16_E2_Write_Begin
_UART1_Data_Ready:
;__Lib_UART_c67.mpas,52 :: 		
;__Lib_UART_c67.mpas,53 :: 		
0x3F07	0x3000      	MOVLW      0
0x3F08	0x0020      	MOVLB      0
0x3F09	0x1A91      	BTFSC      PIR1, 5
0x3F0A	0x3001      	MOVLW      1
0x3F0B	0x00F1      	MOVWF      R1
;__Lib_UART_c67.mpas,54 :: 		
0x3F0C	0x0871      	MOVF       R1, 0
0x3F0D	0x00F0      	MOVWF      R0
L_end_UART1_Data_Ready:
0x3F0E	0x0008      	RETURN
; end of _UART1_Data_Ready
_UART1_Read:
;__Lib_UART_c67.mpas,60 :: 		
;__Lib_UART_c67.mpas,61 :: 		
0x3F0F	0x0023      	MOVLB      3
0x3F10	0x0819      	MOVF       RCREG, 0
0x3F11	0x00F2      	MOVWF      R2
;__Lib_UART_c67.mpas,62 :: 		
0x3F12	0x1C9D      	BTFSS      RCSTA, 1
0x3F13	0x2F16      	GOTO       L__UART1_Read9
;__Lib_UART_c67.mpas,64 :: 		
0x3F14	0x121D      	BCF        RCSTA, 4
;__Lib_UART_c67.mpas,65 :: 		
0x3F15	0x161D      	BSF        RCSTA, 4
;__Lib_UART_c67.mpas,66 :: 		
L__UART1_Read9:
;__Lib_UART_c67.mpas,67 :: 		
0x3F16	0x0872      	MOVF       R2, 0
0x3F17	0x00F1      	MOVWF      R1
;__Lib_UART_c67.mpas,68 :: 		
0x3F18	0x0871      	MOVF       R1, 0
0x3F19	0x00F0      	MOVWF      R0
L_end_UART1_Read:
0x3F1A	0x0008      	RETURN
; end of _UART1_Read
_Usart_Write_Loop:
;bootfor16_E2.mbas,128 :: 		dim stop_flag, r, tmp as byte
;bootfor16_E2.mbas,129 :: 		r     = 0
0x3F1B	0x0021      	MOVLB      1
0x3F1C	0x01AD      	CLRF       Usart_Write_Loop_r
;bootfor16_E2.mbas,130 :: 		stop_flag  = 0
0x3F1D	0x01AC      	CLRF       Usart_Write_Loop_stop_flag
;bootfor16_E2.mbas,131 :: 		while (stop_flag <> 1)
L__Usart_Write_Loop27:
0x3F1E	0x0021      	MOVLB      1
0x3F1F	0x082C      	MOVF       Usart_Write_Loop_stop_flag, 0
0x3F20	0x3A01      	XORLW      1
0x3F21	0x1903      	BTFSC      STATUS, 2
0x3F22	0x2F5D      	GOTO       L__Usart_Write_Loop28
;bootfor16_E2.mbas,132 :: 		Delay_ms(5)
0x3F23	0x300D      	MOVLW      13
0x3F24	0x00FC      	MOVWF      R12
0x3F25	0x30FB      	MOVLW      251
0x3F26	0x00FD      	MOVWF      R13
L__Usart_Write_Loop31:
0x3F27	0x0BFD      	DECFSZ     R13, 1
0x3F28	0x2F27      	GOTO       L__Usart_Write_Loop31
0x3F29	0x0BFC      	DECFSZ     R12, 1
0x3F2A	0x2F27      	GOTO       L__Usart_Write_Loop31
0x3F2B	0x0000      	NOP
0x3F2C	0x0000      	NOP
;bootfor16_E2.mbas,133 :: 		uw(send)
0x3F2D	0x0020      	MOVLB      0
0x3F2E	0x086D      	MOVF       FARG_Usart_Write_Loop_send, 0
0x3F2F	0x0021      	MOVLB      1
0x3F30	0x00AF      	MOVWF      FARG_uw_in
0x3F31	0x263C      	CALL       _uw
;bootfor16_E2.mbas,134 :: 		Delay_ms(5)
0x3F32	0x300D      	MOVLW      13
0x3F33	0x00FC      	MOVWF      R12
0x3F34	0x30FB      	MOVLW      251
0x3F35	0x00FD      	MOVWF      R13
L__Usart_Write_Loop32:
0x3F36	0x0BFD      	DECFSZ     R13, 1
0x3F37	0x2F36      	GOTO       L__Usart_Write_Loop32
0x3F38	0x0BFC      	DECFSZ     R12, 1
0x3F39	0x2F36      	GOTO       L__Usart_Write_Loop32
0x3F3A	0x0000      	NOP
0x3F3B	0x0000      	NOP
;bootfor16_E2.mbas,135 :: 		tmp  = 0
0x3F3C	0x0021      	MOVLB      1
0x3F3D	0x01AE      	CLRF       Usart_Write_Loop_tmp
;bootfor16_E2.mbas,136 :: 		if UART1_Data_Ready then
0x3F3E	0x2707      	CALL       _UART1_Data_Ready
0x3F3F	0x0870      	MOVF       R0, 0
0x3F40	0x1903      	BTFSC      STATUS, 2
0x3F41	0x2F46      	GOTO       L__Usart_Write_Loop34
;bootfor16_E2.mbas,137 :: 		tmp  = UART1_Read
0x3F42	0x270F      	CALL       _UART1_Read
0x3F43	0x0870      	MOVF       R0, 0
0x3F44	0x0021      	MOVLB      1
0x3F45	0x00AE      	MOVWF      Usart_Write_Loop_tmp
L__Usart_Write_Loop34:
0x3F46	0x0021      	MOVLB      1
;bootfor16_E2.mbas,139 :: 		Inc(r)
0x3F47	0x0AAD      	INCF       Usart_Write_Loop_r, 1
;bootfor16_E2.mbas,140 :: 		if ((r = 255) or (tmp = receive)) then  ' if r = 255 -> 255 chars arrived, none of them matched
0x3F48	0x082D      	MOVF       Usart_Write_Loop_r, 0
0x3F49	0x3AFF      	XORLW      255
0x3F4A	0x30FF      	MOVLW      255
0x3F4B	0x1D03      	BTFSS      STATUS, 2
0x3F4C	0x3000      	MOVLW      0
0x3F4D	0x00F1      	MOVWF      R1
0x3F4E	0x082E      	MOVF       Usart_Write_Loop_tmp, 0
0x3F4F	0x0020      	MOVLB      0
0x3F50	0x066E      	XORWF      FARG_Usart_Write_Loop_receive, 0
0x3F51	0x30FF      	MOVLW      255
0x3F52	0x1D03      	BTFSS      STATUS, 2
0x3F53	0x3000      	MOVLW      0
0x3F54	0x00F0      	MOVWF      R0
0x3F55	0x0871      	MOVF       R1, 0
0x3F56	0x04F0      	IORWF       R0, 1
0x3F57	0x1903      	BTFSC      STATUS, 2
0x3F58	0x2F5C      	GOTO       L__Usart_Write_Loop37
;bootfor16_E2.mbas,141 :: 		stop_flag  = 1
0x3F59	0x3001      	MOVLW      1
0x3F5A	0x0021      	MOVLB      1
0x3F5B	0x00AC      	MOVWF      Usart_Write_Loop_stop_flag
L__Usart_Write_Loop37:
;bootfor16_E2.mbas,143 :: 		wend
0x3F5C	0x2F1E      	GOTO       L__Usart_Write_Loop27
L__Usart_Write_Loop28:
0x3F5D	0x0021      	MOVLB      1
;bootfor16_E2.mbas,144 :: 		result  = r
0x3F5E	0x082D      	MOVF       Usart_Write_Loop_r, 0
0x3F5F	0x0020      	MOVLB      0
0x3F60	0x00EF      	MOVWF      Usart_Write_Loop_local_result
;bootfor16_E2.mbas,145 :: 		end sub
0x3F61	0x086F      	MOVF       Usart_Write_Loop_local_result, 0
0x3F62	0x00F0      	MOVWF      R0
L_end_Usart_Write_Loop:
0x3F63	0x0008      	RETURN
; end of _Usart_Write_Loop
_Uart_Begin:
;RS485_E.mbas,23 :: 		sub procedure  Uart_Begin()
;RS485_E.mbas,24 :: 		Uart1_init(9600)        'Set baudrate here
0x3F64	0x0023      	MOVLB      3
0x3F65	0x159F      	BSF        BAUDCON, 3
0x3F66	0x30CF      	MOVLW      207
0x3F67	0x009B      	MOVWF      SPBRG
0x3F68	0x019C      	CLRF       SPBRG+1
0x3F69	0x151E      	BSF        TXSTA, 2
0x3F6A	0x260A      	CALL       _UART1_Init
;RS485_E.mbas,26 :: 		R485_Set          'allows half duplex mode with portC.0 as switch pin
0x3F6B	0x2605      	CALL       _R485_Set
;RS485_E.mbas,28 :: 		end sub
L_end_Uart_Begin:
0x3F6C	0x0008      	RETURN
; end of _Uart_Begin
_Start_Bootload:
;bootfor16_E2.mbas,221 :: 		j as word        'j * 32. 0 based addressing. i is position in block
;bootfor16_E2.mbas,222 :: 		i  = 0             'creates an array of j x 32 words in ROM when written
0x3F6D	0x0020      	MOVLB      0
0x3F6E	0x01ED      	CLRF       Start_Bootload_i
;bootfor16_E2.mbas,223 :: 		j  = 0
0x3F6F	0x01EE      	CLRF       Start_Bootload_j
0x3F70	0x01EF      	CLRF       Start_Bootload_j+1
;bootfor16_E2.mbas,224 :: 		while true
L__Start_Bootload57:
;bootfor16_E2.mbas,225 :: 		if (i = 32) then               ' If 32 words received then erase flash
0x3F71	0x086D      	MOVF       Start_Bootload_i, 0
0x3F72	0x3A20      	XORLW      32
0x3F73	0x1D03      	BTFSS      STATUS, 2
0x3F74	0x2F8B      	GOTO       L__Start_Bootload62
;bootfor16_E2.mbas,226 :: 		if (j = 0) then          ' The first block of 32 instructions contains "GOTO MAIN"
0x3F75	0x3000      	MOVLW      0
0x3F76	0x066F      	XORWF      Start_Bootload_j+1, 0
0x3F77	0x1D03      	BTFSS      STATUS, 2
0x3F78	0x2F7B      	GOTO       L__Start_Bootload87
0x3F79	0x3000      	MOVLW      0
0x3F7A	0x066E      	XORWF      Start_Bootload_j, 0
L__Start_Bootload87:
0x3F7B	0x1D03      	BTFSS      STATUS, 2
0x3F7C	0x2F7E      	GOTO       L__Start_Bootload65
;bootfor16_E2.mbas,227 :: 		Write_Begin()          'and gets written to very top of ROM
0x3F7D	0x2648      	CALL       bootfor16_E2_Write_Begin
L__Start_Bootload65:
;bootfor16_E2.mbas,229 :: 		Write_prog(j)            'j gets multiplied by 32 and is a "page" pointer to
0x3F7E	0x0020      	MOVLB      0
0x3F7F	0x086E      	MOVF       Start_Bootload_j, 0
0x3F80	0x0022      	MOVLB      2
0x3F81	0x00A0      	MOVWF      FARG_Write_Prog_madd
0x3F82	0x0020      	MOVLB      0
0x3F83	0x086F      	MOVF       Start_Bootload_j+1, 0
0x3F84	0x0022      	MOVLB      2
0x3F85	0x00A1      	MOVWF      FARG_Write_Prog_madd+1
0x3F86	0x2568      	CALL       bootfor16_E2_Write_Prog
;bootfor16_E2.mbas,231 :: 		i  = 0
0x3F87	0x01ED      	CLRF       Start_Bootload_i
;bootfor16_E2.mbas,232 :: 		Inc(j)                  'note j is never reset here but just increments
0x3F88	0x0AEE      	INCF       Start_Bootload_j, 1
0x3F89	0x1903      	BTFSC      STATUS, 2
0x3F8A	0x0AEF      	INCF       Start_Bootload_j+1, 1
L__Start_Bootload62:
;bootfor16_E2.mbas,235 :: 		uw("y")                        ' Ask for data low byte
0x3F8B	0x3079      	MOVLW      121
0x3F8C	0x0021      	MOVLB      1
0x3F8D	0x00AF      	MOVWF      FARG_uw_in
0x3F8E	0x263C      	CALL       _uw
;bootfor16_E2.mbas,236 :: 		do
L__Start_Bootload67:
;bootfor16_E2.mbas,237 :: 		nop
0x3F8F	0x0000      	NOP
;bootfor16_E2.mbas,238 :: 		loop until (Uart1_Data_Ready() = 1)
0x3F90	0x2707      	CALL       _UART1_Data_Ready
0x3F91	0x0870      	MOVF       R0, 0
0x3F92	0x3A01      	XORLW      1
0x3F93	0x1903      	BTFSC      STATUS, 2
0x3F94	0x2F96      	GOTO       L__Start_Bootload70
0x3F95	0x2F8F      	GOTO       L__Start_Bootload67
L__Start_Bootload70:
;bootfor16_E2.mbas,239 :: 		rcv_2  = Uart1_Read()              ' Read rcv_2
0x3F96	0x270F      	CALL       _UART1_Read
0x3F97	0x0870      	MOVF       R0, 0
0x3F98	0x0020      	MOVLB      0
0x3F99	0x00E7      	MOVWF      bootfor16_E2_rcv_2
0x3F9A	0x01E8      	CLRF       bootfor16_E2_rcv_2+1
;bootfor16_E2.mbas,240 :: 		uw("x")                            ' Ask for data high byte
0x3F9B	0x3078      	MOVLW      120
0x3F9C	0x0021      	MOVLB      1
0x3F9D	0x00AF      	MOVWF      FARG_uw_in
0x3F9E	0x263C      	CALL       _uw
;bootfor16_E2.mbas,241 :: 		do
L__Start_Bootload72:
;bootfor16_E2.mbas,242 :: 		nop
0x3F9F	0x0000      	NOP
;bootfor16_E2.mbas,243 :: 		loop until (Uart1_Data_Ready() = 1)
0x3FA0	0x2707      	CALL       _UART1_Data_Ready
0x3FA1	0x0870      	MOVF       R0, 0
0x3FA2	0x3A01      	XORLW      1
0x3FA3	0x1903      	BTFSC      STATUS, 2
0x3FA4	0x2FA6      	GOTO       L__Start_Bootload75
0x3FA5	0x2F9F      	GOTO       L__Start_Bootload72
L__Start_Bootload75:
;bootfor16_E2.mbas,244 :: 		rcv_1  = Uart1_Read()              ' Read rcv_1
0x3FA6	0x270F      	CALL       _UART1_Read
0x3FA7	0x0870      	MOVF       R0, 0
0x3FA8	0x0020      	MOVLB      0
0x3FA9	0x00E5      	MOVWF      bootfor16_E2_rcv_1
0x3FAA	0x01E6      	CLRF       bootfor16_E2_rcv_1+1
;bootfor16_E2.mbas,245 :: 		block[i]  = rcv_1 << 8             ' Save rcv_1 and rcv_2 in block[i]
0x3FAB	0x086D      	MOVF       Start_Bootload_i, 0
0x3FAC	0x00F0      	MOVWF      R0
0x3FAD	0x01F1      	CLRF       R1
0x3FAE	0x35F0      	LSLF       R0, 1
0x3FAF	0x0DF1      	RLF        R1, 1
0x3FB0	0x3020      	MOVLW      bootfor16_E2_block
0x3FB1	0x0770      	ADDWF      R0, 0
0x3FB2	0x0086      	MOVWF      FSR1
0x3FB3	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3FB4	0x3D71      	ADDWFC     R1, 0
0x3FB5	0x0087      	MOVWF      FSR1H
0x3FB6	0x0865      	MOVF       bootfor16_E2_rcv_1, 0
0x3FB7	0x00F1      	MOVWF      R1
0x3FB8	0x01F0      	CLRF       R0
0x3FB9	0x0870      	MOVF       R0, 0
0x3FBA	0x0081      	MOVWF      INDF1
0x3FBB	0x0871      	MOVF       R1, 0
0x3FBC	0x3141      	ADDFSR     1, 1
0x3FBD	0x0081      	MOVWF      INDF1
;bootfor16_E2.mbas,246 :: 		block[i]  = block[i] or rcv_2
0x3FBE	0x086D      	MOVF       Start_Bootload_i, 0
0x3FBF	0x00F0      	MOVWF      R0
0x3FC0	0x01F1      	CLRF       R1
0x3FC1	0x35F0      	LSLF       R0, 1
0x3FC2	0x0DF1      	RLF        R1, 1
0x3FC3	0x3020      	MOVLW      bootfor16_E2_block
0x3FC4	0x0770      	ADDWF      R0, 0
0x3FC5	0x0086      	MOVWF      FSR1
0x3FC6	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3FC7	0x3D71      	ADDWFC     R1, 0
0x3FC8	0x0087      	MOVWF      FSR1H
0x3FC9	0x3020      	MOVLW      bootfor16_E2_block
0x3FCA	0x0770      	ADDWF      R0, 0
0x3FCB	0x0084      	MOVWF      FSR0
0x3FCC	0x3000      	MOVLW      hi_addr(bootfor16_E2_block)
0x3FCD	0x3D71      	ADDWFC     R1, 0
0x3FCE	0x0085      	MOVWF      FSR0H
0x3FCF	0x0867      	MOVF       bootfor16_E2_rcv_2, 0
0x3FD0	0x0400      	IORWF       INDF0, 0
0x3FD1	0x00F0      	MOVWF      R0
0x3FD2	0x3101      	ADDFSR     0, 1
0x3FD3	0x0800      	MOVF       INDF0, 0
0x3FD4	0x0468      	IORWF       bootfor16_E2_rcv_2+1, 0
0x3FD5	0x00F1      	MOVWF      R1
0x3FD6	0x0870      	MOVF       R0, 0
0x3FD7	0x0081      	MOVWF      INDF1
0x3FD8	0x0871      	MOVF       R1, 0
0x3FD9	0x3141      	ADDFSR     1, 1
0x3FDA	0x0081      	MOVWF      INDF1
;bootfor16_E2.mbas,247 :: 		Inc(i)                             ' Next program word
0x3FDB	0x0AED      	INCF       Start_Bootload_i, 1
;bootfor16_E2.mbas,248 :: 		wend
0x3FDC	0x2F71      	GOTO       L__Start_Bootload57
;bootfor16_E2.mbas,249 :: 		end  sub
L_end_Start_Bootload:
0x3FDD	0x0008      	RETURN
; end of _Start_Bootload
_Start_program:
;bootfor16_E2.mbas,43 :: 		sub procedure Start_program() org(__FLASH_SIZE - 8)   'find top 8 words of Prog ROM
;bootfor16_E2.mbas,44 :: 		nop  nop  nop  nop
0x3FF8	0x0000      	NOP
0x3FF9	0x0000      	NOP
0x3FFA	0x0000      	NOP
0x3FFB	0x0000      	NOP
;bootfor16_E2.mbas,45 :: 		nop  nop  nop           'some of these NOPs get overwritten by
0x3FFC	0x0000      	NOP
0x3FFD	0x0000      	NOP
0x3FFE	0x0000      	NOP
;bootfor16_E2.mbas,48 :: 		end sub
L_end_Start_program:
0x3FFF	0x0008      	RETURN
; end of _Start_program
Symbol List:
//** Routines locations **
//ADDRESS    SIZE    PROCEDURE
//----------------------------------------------
0x3D40      [18]    _main
0x3D52      [22]    bootfor16_E2_Erase_Prog
0x3D68     [115]    bootfor16_E2_Write_Prog
0x3DDB      [32]    _FLASH_Read
0x3DFB      [10]    _UART1_Write
0x3E05       [5]    _R485_Set
0x3E0A      [50]    _UART1_Init
0x3E3C      [12]    _uw
0x3E48     [191]    bootfor16_E2_Write_Begin
0x3F07       [8]    _UART1_Data_Ready
0x3F0F      [12]    _UART1_Read
0x3F1B      [73]    _Usart_Write_Loop
0x3F64       [9]    _Uart_Begin
0x3F6D     [113]    _Start_Bootload
0x3FF8       [8]    _Start_program
//** Variables locations ** 
//ADDRESS    SIZE    VARIABLE
//----------------------------------------------
0x0000       [1]    INDF0
0x0001       [1]    INDF1
0x0003       [1]    STATUS
0x0004       [1]    FSR0L
0x0005       [1]    FSR0H
0x0006       [1]    FSR1L
0x0007       [1]    FSR1H
0x000A       [1]    PCLATH
0x000B       [1]    INTCON
0x000E       [0]    RS485_E_rts
0x000E       [0]    RC0_bit
0x0011       [1]    PIR1
0x0020      [64]    bootfor16_E2_block
0x0060       [1]    bootfor16_E2_intsave
0x0061       [2]    bootfor16_E2_uadd
0x0063       [2]    bootfor16_E2_topm
0x0065       [2]    bootfor16_E2_rcv_1
0x0067       [2]    bootfor16_E2_rcv_2
0x0069       [4]    _UART_Rd_Ptr
0x006D       [1]    FARG_Usart_Write_Loop_send
0x006D       [1]    Start_Bootload_i
0x006E       [2]    Start_Bootload_j
0x006E       [1]    FARG_Usart_Write_Loop_receive
0x006F       [1]    Usart_Write_Loop_local_result
0x0070       [1]    R0
0x0071       [1]    R1
0x0072       [1]    R2
0x0073       [1]    R3
0x0074       [1]    R4
0x0075       [1]    R5
0x0076       [1]    R6
0x0077       [1]    R7
0x0078       [1]    R8
0x0079       [1]    R9
0x007A       [1]    R10
0x007B       [1]    R11
0x007C       [1]    R12
0x007D       [1]    R13
0x007E       [1]    R14
0x007F       [1]    R15
0x008E       [0]    RS485_E_rtz
0x008E       [0]    TRISC7_bit
0x008E       [0]    TRISC6_bit
0x008E       [0]    TRISC0_bit
0x0099       [1]    OSCCON
0x00A0       [4]    _UART_Rdy_Ptr
0x00A4       [4]    _UART_TX_Idle_Ptr
0x00A8       [4]    _UART_Wr_Ptr
0x00AC       [1]    Usart_Write_Loop_stop_flag
0x00AD       [1]    Usart_Write_Loop_r
0x00AE       [1]    Usart_Write_Loop_tmp
0x00AF       [1]    FARG_uw_in
0x00AF      [64]    Write_Begin_psave
0x00EF       [1]    Write_Begin_i
0x0120       [2]    FARG_Write_Prog_madd
0x0120       [2]    FARG_FLASH_Read_address
0x0120       [1]    FARG_UART1_Write_data_
0x0122       [1]    Write_Prog_i
0x0191       [2]    EEADR
0x0191       [1]    EEADRL
0x0192       [1]    EEADRH
0x0193       [1]    EEDATL
0x0194       [1]    EEDATH
0x0195       [1]    EECON1
0x0196       [1]    EECON2
0x0199       [1]    RCREG
0x019A       [1]    TXREG
0x019B       [2]    SPBRG
0x019C       [1]    SPBRGH
0x019D       [1]    RCSTA
0x019E       [1]    TXSTA
0x019F       [1]    BAUDCON
//** Label List: ** 
//----------------------------------------------
  L_end__Start_program
  L_end_bootfor16_E2_Erase_Prog
  L_bootfor16_E2_Erase_Prog2
  L_bootfor16_E2_Erase_Prog3
  L_bootfor16_E2_Erase_Prog4
  L_bootfor16_E2_Erase_Prog5
  L_bootfor16_E2_Erase_Prog6
  L_end_bootfor16_E2_Write_Prog
  L_bootfor16_E2_Write_Prog8
  L_bootfor16_E2_Write_Prog9
  L_bootfor16_E2_Write_Prog10
  L_bootfor16_E2_Write_Prog11
  L_bootfor16_E2_Write_Prog12
  L_bootfor16_E2_Write_Prog13
  L_bootfor16_E2_Write_Prog14
  L_bootfor16_E2_Write_Prog15
  L_bootfor16_E2_Write_Prog16
  L_bootfor16_E2_Write_Prog17
  L_bootfor16_E2_Write_Prog18
  L_bootfor16_E2_Write_Prog19
  L_bootfor16_E2_Write_Prog20
  L_bootfor16_E2_Write_Prog21
  L_bootfor16_E2_Write_Prog22
  L_bootfor16_E2_Write_Prog23
  L_bootfor16_E2_Write_Prog24
  L_end__Usart_Write_Loop
  L__Usart_Write_Loop26
  L__Usart_Write_Loop27
  L__Usart_Write_Loop28
  L__Usart_Write_Loop29
  L__Usart_Write_Loop30
  L__Usart_Write_Loop31
  L__Usart_Write_Loop32
  L__Usart_Write_Loop33
  L__Usart_Write_Loop34
  L__Usart_Write_Loop35
  L__Usart_Write_Loop36
  L__Usart_Write_Loop37
  L__Usart_Write_Loop38
  L_end_bootfor16_E2_Write_Begin
  L_bootfor16_E2_Write_Begin40
  L_bootfor16_E2_Write_Begin41
  L_bootfor16_E2_Write_Begin42
  L_bootfor16_E2_Write_Begin43
  L_bootfor16_E2_Write_Begin44
  L_bootfor16_E2_Write_Begin45
  L_bootfor16_E2_Write_Begin46
  L_bootfor16_E2_Write_Begin47
  L_bootfor16_E2_Write_Begin48
  L_bootfor16_E2_Write_Begin49
  L_bootfor16_E2_Write_Begin50
  L_bootfor16_E2_Write_Begin51
  L_bootfor16_E2_Write_Begin52
  L_bootfor16_E2_Write_Begin53
  L_bootfor16_E2_Write_Begin54
  L_end__Start_Bootload
  L__Start_Bootload56
  L__Start_Bootload57
  L__Start_Bootload58
  L__Start_Bootload59
  L__Start_Bootload60
  L__Start_Bootload61
  L__Start_Bootload62
  L__Start_Bootload63
  L__Start_Bootload64
  L__Start_Bootload65
  L__Start_Bootload66
  L__Start_Bootload67
  L__Start_Bootload68
  L__Start_Bootload69
  L__Start_Bootload70
  L__Start_Bootload71
  L__Start_Bootload72
  L__Start_Bootload73
  L__Start_Bootload74
  L__Start_Bootload75
  L__Start_Bootload76
  L_end_Start_program
  _Start_program
  L_end_Erase_Prog
  bootfor16_E2_Erase_Prog
  L_end_Write_Prog
  bootfor16_E2_Write_Prog
  L_bootfor16_E2_Write_Prog80
  L_bootfor16_E2_Write_Prog81
  L_end_Usart_Write_Loop
  _Usart_Write_Loop
  L_end_Write_Begin
  bootfor16_E2_Write_Begin
  L_bootfor16_E2_Write_Begin84
  L_bootfor16_E2_Write_Begin85
  L_end_Start_Bootload
  _Start_Bootload
  L__Start_Bootload87
  L_end__main
  L__main1
  L__main2
  L__main3
  L_end_main
  _main
  L_end__R485_Set
  L_end__Uart_Begin
  L_end__uw
  L__uw3
  L__uw4
  L__uw5
  L__uw6
  L__uw7
  L_end_R485_Set
  _R485_Set
  L_end_Uart_Begin
  _Uart_Begin
  L_end_uw
  _uw
  L_end__FLASH_Read
  L_end__FLASH_Write
  L__FLASH_Write2
  L__FLASH_Write3
  L__FLASH_Write4
  L__FLASH_Write5
  L__FLASH_Write6
  L_end__FLASH_Erase
  L_end_FLASH_Read
  _FLASH_Read
  L_end_FLASH_Write
  _FLASH_Write
  L__FLASH_Write10
  L__FLASH_Write11
  L_end_FLASH_Erase
  _FLASH_Erase
  L__FLASH_Erase13
  L__FLASH_Erase14
  L_end__UART1_Init
  L__UART1_Init1
  L__UART1_Init2
  L__UART1_Init3
  L__UART1_Init4
  L__UART1_Init5
  L_end__UART1_Data_Ready
  L_end__UART1_Read
  L__UART1_Read8
  L__UART1_Read9
  L__UART1_Read10
  L_end__UART1_TX_Idle
  L_end__UART1_Write
  L__UART1_Write13
  L__UART1_Write14
  L__UART1_Write15
  L__UART1_Write16
  L__UART1_Write17
  L_end__UART1_Write_Text
  L__UART1_Write_Text19
  L__UART1_Write_Text20
  L__UART1_Write_Text21
  L__UART1_Write_Text22
  L__UART1_Write_Text23
  L_end__UART1_Read_Text
  L__UART1_Read_Text25
  L__UART1_Read_Text26
  L__UART1_Read_Text27
  L__UART1_Read_Text28
  L__UART1_Read_Text29
  L__UART1_Read_Text30
  L__UART1_Read_Text31
  L__UART1_Read_Text32
  L__UART1_Read_Text33
  L__UART1_Read_Text34
  L__UART1_Read_Text35
  L__UART1_Read_Text36
  L__UART1_Read_Text37
  L__UART1_Read_Text38
  L__UART1_Read_Text39
  L__UART1_Read_Text40
  L__UART1_Read_Text41
  L__UART1_Read_Text42
  L__UART1_Read_Text43
  L__UART1_Read_Text44
  L__UART1_Read_Text45
  L__UART1_Read_Text46
  L_end__UART_Set_Active
  L_end__UART_Write
  L_end__UART_Data_Ready
  L_end__UART_Read
  L_end__UART_TX_Idle
  L_end__UART_Write_Text
  L__UART_Write_Text53
  L__UART_Write_Text54
  L__UART_Write_Text55
  L__UART_Write_Text56
  L__UART_Write_Text57
  L_end__UART_Read_Text
  L__UART_Read_Text59
  L__UART_Read_Text60
  L__UART_Read_Text61
  L__UART_Read_Text62
  L__UART_Read_Text63
  L__UART_Read_Text64
  L__UART_Read_Text65
  L__UART_Read_Text66
  L__UART_Read_Text67
  L__UART_Read_Text68
  L__UART_Read_Text69
  L__UART_Read_Text70
  L__UART_Read_Text71
  L__UART_Read_Text72
  L__UART_Read_Text73
  L__UART_Read_Text74
  L__UART_Read_Text75
  L__UART_Read_Text76
  L__UART_Read_Text77
  L__UART_Read_Text78
  L__UART_Read_Text79
  L__UART_Read_Text80
  L_end_UART1_Init
  _UART1_Init
  L_end_UART1_Data_Ready
  _UART1_Data_Ready
  L_end_UART1_Read
  _UART1_Read
  L_end_UART1_TX_Idle
  _UART1_TX_Idle
  L_end_UART1_Write
  _UART1_Write
  L_end_UART1_Write_Text
  _UART1_Write_Text
  L_end_UART1_Read_Text
  _UART1_Read_Text
  L_end_UART_Set_Active
  _UART_Set_Active
  L_end_UART_Write
  _UART_Write
  L_end_UART_Data_Ready
  _UART_Data_Ready
  L_end_UART_Read
  _UART_Read
  L_end_UART_TX_Idle
  _UART_TX_Idle
  L_end_UART_Write_Text
  _UART_Write_Text
  L_end_UART_Read_Text
  _UART_Read_Text
