PN2060C Phase Noise Analyzer
Summary
The PN2060C Phase Noise Analyzer measures the amplitude, phase noise of high-performance RF sources.
Features
Independent input and reference frequencies from 1 to 200MHz
No phase-locking or measurement calibration required
Dual reference oscillator inputs allow cross-correlation measurements
Measurement results are saved to file automatically
Scripts are provided for post-data manipulation, raw data (full 4 channels baseband, 32Mbytes/S) can be exported for further analysis
USB3.0 interface with high-speed data exchange
Allan deviation: two channel cross-correlation supported
TCPServer application available: can send data streams to other applications.
Measurements
Phase noise at offsets from 0.01Hz to 1MHz and levels typically below -185dBc/Hz (10MHz floor)
One high quality USB3.0 cable is enough to complete data collection and power supply
System Noise Floor Specification:
|
Offset |
10MHz carrier (90minutes) |
|
1Hz |
-130 |
|
10Hz |
-150 |
|
100Hz |
-165 |
|
1KHz |
-175 |
|
10KHz |
-180 |
|
>100KHz |
-180 |
Electrical Specifications: Input Signal Level: 10dBm (max), Input Impedance: 50
Mechanical Specifications
Size: 11 x 10 x 4 (cm), Power: USB3.0 power supply with about 1.3A. Operating Temperature: 0-30deg
Unit Weight: 0.5kg.
Front Panel: SMA RF connector ( DUT1, DUT2, REF1, REF2)
Real Panel: Type-C ( USB3.0 to Type-C cable needed)
Software: 1) WIN7/WIN10/WIN11 64bit supported (test setup, real-time update of phase noise, and collect raw data), scripts for post-process.
Driver: USB3.0 interface
Hardware Version: PN2060C V1.4
Typical measurement examples:
1) Allan Deviation Floor Test: By using an ordinary 10M OCXO (DATUM 2750053-1), AllanDev floor is tested (about 110 minutes). Better results may be possible by using high quality OCXOs.
2)Test result for a 10M OCXO (DATUM 2750013-1): The input level of the DUT1,2 is about 3.5dBm, and the input level of the REF1,2 is about 7dBm.
3) Demonstration of “Raw Data”: With the “four channel” option, all the information (phase noise, AllanDev, frequencies, etc.) can be extracted from the “Raw Data”, following is an example, where DUT, REF1, REF2 are all 10MHz. New algorithms (or applications) can be developed based on the “Raw Data”.
4) Hardware V1.2 Available: External clock can be supported in an elegant way without any modification.
5) V6.16 released. A TCPServer (with a better algorithm) is implemented in this release. The TCPServer function can send data stream to other applications (Example setup: AllanDEV, tap: 2, sample rate: 2078 sps (Fast) or 1039 sps (Slow), data stream: phase difference of DUT1 to REF1 )
6) Phase-locked Module Design
A phase-locked module is designed, where a CVHD-950X-125 is phase-locked to an old OCXO (CTI 10MHz). It can also be locked to a 100MHz (or 200MHz) VCXO (or OCXO).
7) Extreme Test: Direct measurement of a 1GHz DRO
A CCSO-914X3-1000 (CCSO-914X-1000 with a better performance) is measured directly. The input signal is attenuated about 25dB by the front-end of the device in this scenario. It is definitely far beyond the specification of the device, and the noise floor is limited to about -145dBc. However, the measurement result is accurate within 10KHz. CVCSO-914-1000 is another variant, which is a voltage-controlled version.
8) Measurement of the CCSO-914X3-1000
with Down-Converters (Link)
Following is the result of the phase noise of CCSO-914X3-1000 with down-converters within about 30 minutes. The best performance can be achieved when the DUT is down-converted to the First Nyquist Zone (1MHz-67.5MHz). At the second Nyquist Zone (67.5MHz-133MHz) and beyond, the measurement ability of the PN2060C will be degenerated gradually. Extremely, at 1GHz, the measurement only accurate within 10KHz deviation.
9) Down-Converter Modules (Link)
As the best performance is achieved in the first Nyquist Zone (1MHz-67.5MHz), down-converters should be adopted beyond the first Nyquist Zone. So, theoretically (if good enough local oscillators available), noise floor of -180dBc can be achieved for any frequency beyond the first Nyquist zone. New down-converters are designed by using Rogers RO4350B PCB material. Aluminum enclosure is adopted along with high-quality SMA connectors (at two GHz ports). Control board is re-used from an earlier design. For best performance & low cost, batteries (18650) are adopted. Otherwise, a “clear” linear power supply should be utilized. The down-converter needs +5V (0.9A) power supply. Fan cooling is also necessary for a long time running. Used & economical 100M OCXO (SC-cut) is utilized. Brand-new 100M OCXO can also be adopted, which is usually very expensive (>$500USD).
Usage of the Down-Converter: The frequency can be changed easily by four keys “< > + -” on the control board with a minimum step of 1KHz. Keep the frequencies of the down-converters 25MHz higher than the DUT. For example, if the DUT is 1000MHz, then let the frequencies of the down-converters to be 1025MHz. There is a 28MHz LPF inside the down-converter. The insertion loss of the down-converters is about -4.4dB at 3GHz. Always let the signal level <10dBm at the input port. 10dB power splitter (DC-12GHz, ZFRSC-123-S+) from mini-circuits is recommended. Totally, there is about 14dB losses @ 3GHz, i.e., if a 3GHz signal@0dBm is presented at input port, -14dBm will be displayed on the UI (DUT1, DUT2). The module can be used from 45M-9GHz without much degeneration. Extremely, it can be used to about 15GHz. However, degeneration can be over 30dB.
The phase noise performance of the module is very similar with the simulation (by using the true phase noise value of the 100M reference). There are about several dBs deviation at 10K offset. New spur removal algorithm is developed, most of the instrument generated spurs will be removed automatically.
10)
Measurement Comparison of a 100M OCXO (Second Nyquist Zone)
A 100M OCXO (XO5051) is measured by two methods: red-line – direct measurement with the PN2060C (V1.4), black line – measurement with down-converters. FSWP can only lock to 200MHz when measuring XO5051s (an interesting phenomenon). However, 6dB difference can be followed precisely. Notice: the measurements are performed on several similar samples (NOT the same one, as the measurement with the FSWP is completed by one of my customers in a university), and deviation from one sample to another can be 5-8dB actually. The comparison shown that the down-converter method can obtain the noise floor precisely while the direct measurement is limited to nearly -170dBc at 100MHz (Second Nyquist Zone). Update: The sample (measured by FSWP) is returned back, and a comparison measurement is completed.
Another sample is measured by PN2060C with the Dual-Channel Down-Converter (about 3 minutes). The noise floor of this sample is about -177dBc. With the Dual-Channel Down-Converter, it is possible to measure noise floor down to -180dBc@100MHz.
11) HP8664A Phase Noise Measurement
HP8664A is a canonical low phase noise signal generator. Following is the phase noise measurement of this unit (with option 004) @1GHz. The measurement results match the specification quiet well although this unit is nearly scrapped (>25 years old). The output level is +8dBm, and there are 10dB power splitter & -4dB insertion loss of the down-converter. So, the input level at DUT1 & DUT2 is about -6dBm.
Comparison with TI’s measurement for the HP8664A (demo link) at 491.52MHz. The results are well matched.
12) Suggestions for the Down-Converter
Modules
a) Easier power supply for the down-converter modules: 7805 voltage regulators can be utilized to power the down-converter module and the control board separately (important for best performance, use separate batteries and 7805 for the down-converter module and the control board!).
b) An ADR4550ARZ daughter-board is designed, which can be used to tune the frequency of the 100M OCXO. The spurs can be minimized if the frequencies of the 100M OCXO are nearly same. Pay attention to the differences of the spurs in video1 and video2.
Ordering Information:
PN2060C V1.4 available
$849USD free shipping worldwide, PayPal accepted, contact us for
detail.
Option: Dual-Channel Down-Converter Kit (2*down-converter-kit) = 2*$299USD = $598USD
1) Rogers RO4350B
PCB material, high quality SMA connectors at GHz ports (Signal output, RF
input).
2) Frequency Range:
45M-9GHz, workable to 15GHz but with great degeneration (30dB).
3) RF input level
<10dBm
4) Conversion Loss -4dB@3GHz, typical.
5) Economical &
used 100M
Reference (XO5051 SC-cut).
6) Signal output
45M-22GHz, +8dBm to -5dBm, vary with frequency.
7) Phase noise
specification (Integer mode, try to avoid fractional-N mode in this
application if possible)
Notice:
1) Fan cooling is necessary for a long time running.
2) Each module should be powered separately (with separate batteries, very important).
|
|
100MHz |
1GHz |
3GHz |
6GHz |
|
10Hz |
<-90dBc |
<-70dBc |
<-60dBc |
<-54dBc |
|
100Hz |
<-120dBc |
<-100dBc |
<-90dBc |
<-84dBc |
|
1KHz |
<-135dBc |
<-115dBc |
<-105dBc |
<-99dBc |
|
10KHz |
<-145dBc |
<-125dBc |
<-115dBc |
<-109dBc |
|
100KHz |
<-150dBc |
<-130dBc |
<-120dBc |
<-114dBc |
|
1MHz |
<-155dBc |
<-135dBc |
<-125dBc |
<-119dBc |
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Attentions:
1)The current is about 1.1-1.5A totally, which can vary with the frequency of the system’s clock. The USB3.0 of some PCs can not provide such a high current while some of them work normally. Some USB3.0 cards can be helpful. The following types of USB3.0 cards have been fully tested and verified.
Update for some mainboards: the economical one (MSI H610 Series) cannot work properly, MSI B760M is verified and running without problems.
2)The default clock is the internal one, with a fixed frequency of 133MHz, which can help you to verify the performance quickly. When you are familiar with this device, you can try to use an external high-quality clock. Some modifications (minor) are necessary when changing the system’s clock. Simulation results show that the following frequencies are “good” ones for a DUT of 10MHz: 13x.2MHz, 13x.4MHz, 13x.6MHz, 13x.8MHz, where “x” can be any value. These frequencies of the ADC clock generate little spurs when the frequency of the DUT or SYS_CLK is drifted. Then, it is easier to be removed by the algorithm. Method of switching to an external clock for V1.1: remove two capacitors as shown in the following figure. On the UI, select “CLK OUT”, the power supply of the internal clocks will be switched off. It is only for experiment, if handled improperly, damage maybe occurred.
3) A fan is installed internally. It can be removed to avoid noise and potential magnetic coupling between the fan and the rf transformers (many of them onboards). As the fan is running with a speed about 6000rpm (or about 100Hz), some spurs (100Hz, 200Hz, 300Hz, 400Hz, 500Hz, and etc.) maybe visible. And it is very interesting that the magnitude of these spurs can vary from one fan to another one as the magnetic distribution of a fan is different also. In other word, it can be used to detect how circular of the magnetic distribution of a fan.
4) The device should be connected to the USB3.0 interface in the back-panel of a PC, not the one in the front panel. The USB3.0 in the front panel usually has a long line connected to the motherboard with exposed connectors, where additional noises may be introduced and the noise floor may be degenerated also.
5)If the sampling frequency of the ADC is lower, the system’s noise floor may tend to be raised also, especially when the frequency of the DUT is high (e.g., 100MHz). It may be the ADC’s characteristics.
6)For the PN2060C V1.1, more filtering elements are added in the front-end of the ADCs. So, additional losses are induced.
7)The second-Nyquist zone and beyond: When diving into deep water area, all the phenomena reported in [1]-[3] can be encountered with different value of attenuators and with different bandwidth of filters. And aliasing may bring errors in noise floor measurements. An active power splitter is designed to perform some experiments. Test results shown that artifacts are more easily occurred with this active power-splitter.
8) Be careful of the phase difference between DUT1 & DUT2. According to [4], artifacts will be introduced with these differences. These kinds of artifacts are theoretically existed in the digital phase noise analyzer. FSWP utilizes another architecture which is trying to minimize them [5, p18].
9) Make a reliable connection between the type-C connector and the device. Always check the validity of the driver in “device manager”. Try to make a 180-degree rotation if necessary.
10) The measurement result of the noise floor tends to be raised-up in second-Nyquist and beyond according to [14], dual-channel down-converter can be adopted to eliminate this effect.
11) According to [6], dual channel down-converter can be designed. A frequency divider with a very good performance [11] is available in literature, and it may be used in this architecture. VK4ZXI (Drew Wollin) managed to make a measurement with his own setup [13].
Acknowledgements:
I would like to thank for Andrew Holme. In the very beginning of the development of the PNA, I have learned a lot from Andrew’s wonderful work [7] and also asked for some helps. In the process of my design, I have gradually developed my own codes from PN2060A to PN2060C. But still use part of Andrew’s source codes in current release. Andrew has granted permission for me to use his source codes. I would thanks to Jim Henderson, Pual Hsieh, and Drew Wollin for their valuable feedbacks and discussions, where Jim Henderson implemented a mixer-based down-converter to extend the frequency range. Drew Wollin has written an introduction and review for beginners [8]. Pual Hsieh has some valuable discussions with me for potential improvement. I am also would like to thanks IW3AUT for the file converter tool which makes it compatible with other applications [9].
Further reading about phase noise
analyzer:
The principle and algorithm of the four-channel digital phase noise analyzer is detailed described in literature about 20 years ago [10]. Following figures [10] describe the detailed process of the four-channel. Firstly, the four channels are DDC (Digital Down Converted) to baseband (I,Q), and then, converted to amplitude and phase through a standard CORDIC algorithm. At last, all the data are uploaded to a PC, and processed according to these figures. There are a lot of such platforms available on market. I just build such a platform which I was preferred as no one such platform satisfy my requirement.
Anyone who is interested in phase noise measurement can dig deep into [12], where full of the most important materials in this area.
References:
[1] Y. Gruson, A. Rus, U. L. Rohde, A. Roth, and E. Rubiola, “Artifacts and errors in cross-spectrum phase noise measurements,” Metrologia, vol. 57, no. 5, pp. Art. no. 055 010 p. 1–12, Oct. 2020, open access.
[2] Y. Gruson, V. Giordano, U. L. Rohde, A. K. Poddar and E. Rubiola, "Cross-spectrum PM noise measurement thermal energy and metamaterial filters", IEEE Trans. Ultrason. Ferroelectr. Freq. Control, vol. 64, no. 3, pp. 634-642, Mar. 2017.
[3] Nelson CW, Hati A, Howe DA. “A collapse of the cross-spectral function in phase noise metrology”. Rev Sci Instrum. 2014 Feb;85(2):024705.
[4] Nelson, C.W., Hati, A. and Howe, D.A. (2013), Phase inversion and collapse of cross-spectral function. Electron. Lett., 49: 1640-1641. https://doi.org/10.1049/el.2013.3022
[6] MicroChip. UHF and Microwave Measurements with the 53100A Phase Noise Analyzer(AN3899).
[7] Andrew Holme. http://www.aholme.co.uk/PhaseNoise/Main.htm
[8] Drew Wollin. https://vk4zxi.blogspot.com/2023/07/an-economical-way-to-measure-phase.html
[9] IW3AUT. http://www.iw3aut.altervista.org/wordpress/?page_id=1570
[10]
Grove, J. et al., "Direct-digital phase-noise measurement," Proc. of
2004 IEEE International Frequency Control Symposium, Montreal, Canada, pp.
287-291, August 2004.
[11] M. M. Driscoll, "Phase noise
performance of analog frequency dividers," in IEEE Transactions on Ultrasonics, Ferroelectrics, and
Frequency Control, vol. 37, no. 4, pp. 295-301, July 1990, doi:
10.1109/58.56490.
[12] https://rubiola.org
[13] https://vk4zxi.blogspot.com/2024/02/pn2060a-ghz-phase-noise-measurement.html
[14] https://scdn.rohde-schwarz.com/ur/pws/dl_downloads/dl_application/application_notes/1gp66/1GP66_4E.pdf
END