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PN2060C Phase Noise Analyzer

[email protected]

Summary

The PN2060C Phase Noise Analyzer measures the amplitude, phase noise of high-performance RF sources.

Features

Independent input and reference frequencies from 1 to 200MHz

No phase-locking or measurement calibration required

Dual reference oscillator inputs allow cross-correlation measurements

Measurement results are saved to file automatically

Scripts are provided for post-data manipulation, raw data (full 4 channels baseband, 32Mbytes/S) can be exported for further analysis

USB3.0 interface with high-speed data exchange

Allan deviation: two channel cross-correlation supported

Measurements

Phase noise at offsets from 0.01Hz to 1MHz and levels below -180dBc/Hz (10MHz floor)

One high quality USB3.0 cable is enough to complete data collection and power supply

System Noise Floor Specification:

Offset	10MHz carrier (90minutes)
1Hz	-130
10Hz	-150
100Hz	-165
1KHz	-175
10KHz	-180
>100KHz	-180

Electrical Specifications: Input Signal Level: 10dBm (max), Input Impedance: 50

Mechanical Specifications

Size: 11 x 10 x 4 (cm), Power: USB3.0 power supply with about 1.1A. Operating Temperature: 0-35deg

Unit Weight: 0.5kg.

Front Panel: SMA RF connector ( DUT1, DUT2, REF1, REF2)

Real Panel: Type-C ( USB3.0 to Type-C cable needed)

Software: 1) WIN7/WIN10/WIN11 64bit supported (test setup, real-time update of phase noise, and collect raw data), scripts for post-process.

Driver: USB3.0 interface

Typical measurement examples:

1) Self-Correlation Noise Floor: Utilizing a 10 MHz OCXO, the Allan deviation floor was tested over approximately 110 minutes, and the phase noise floor is also measured over 4 hours.

Note:

i) Notches in the measurement. Samuel R. Stein [15] has detailed descriptions (solutions) about them*.

ii) An issue in the self-correlation process was identified by Visme (PhD student) at the FEMTO-ST Institute [17], where the noise floor exhibited abnormal behavior when the frequency deviation was less than approximately 1 Hz. It is a typical measurement (setup) failure, emphasizing the importance of meticulous hardware design, and this phenomenon is not observed in the PN2060C analyzer. Meanwhile, Pomponio at NIST [18] demonstrated that, with a carefully optimized setup, a digital PNA can achieve phase noise levels below −160 dBc/Hz at a 1 Hz offset, with a measurement time of approximately two days. The principle and algorithm of the digital phase noise analyzer is detailed described in literature about 20 years ago [10].

iii) Carefully configure the self-correlation setup, as failure to follow the guidelines will lead to various unexpected issues.

iv) AN Measurement: After selecting "AN" on the UI, restart the application; otherwise, the measurement results will be corrupted.

2) PN2060C vs Agilent E5052: Measurement of a 49.152MHz XO (link)

SCTF LN 49.152M XO: CMOS output, 11dBm, square wave. When measuring such XOs, a filter is necessary to prevent harmonics from affecting the measurement results. To address impedance mismatch, insert an attenuator in series.

Critical Capacitors: One capacitor (2.2uF) should be placed as close as possible to the XO, while another capacitor is used to isolate the DC from the output pin. Without these capacitors, the measurement result will be significantly degraded. This may explain the design of some Crystek’s XOs.

3) PN2060C vs HP3048A: Internal A (10MHz) vs Internal B (10MHz) (link)

The internal A (10MHz) and internal B (10MHz) of HP3048 are phase-locked with each-other in this measurement. In the measurement with PN2060C, it is in an open-loop configuration, and there is a spur at about 3.5Hz which is the frequency difference of internal A and B.

4) Comparative test on a batch of 10 MHz oscillators using PN2060C and 53100A

All the tests were completed at a crystal workshop within a short timeframe, ranging from 3 to 9 minutes for the PN2060C, and 10 minutes for the 53100A. One of the test results is shown in the following plot.

5) Measurement of Rubidium Frequency Standards: XHTF1003H vs PRS10

The XHTF1003H has a better performance (<100s). HP5071A is necessary (as References) for a accuracy measurement result.

Notes & Warnings:

1) As a digital phase noise analyzer, artifacts can be occurred according to [1, detail]. All the phenomenon reported in [1] can be reproduced with some specific power splitters (3dB/6dB/10dB/active) & filters & attenuators & specific OCXOs. Strange behaviors will be resulted from impedance mismatch & poor isolation & aliasing frequencies. Solution: Series an attenuator, such as 6dB to improve impedance mismatch, and mini-circuits SLP-50+ (Nyquist Filter) can be used to remove aliasing frequencies. Isolation AMPs should be adopted for some OCXOs with poor isolation.

2) Some OCXOs have poor isolation, such as part of the old DATUM 2750013-1 models (not all of them). This can result in significant deviations during measurement. Therefore, the use of isolation amplifiers or attenuators is essential for accurate results. Following is a comparison with/without 6dB attenuator.

6) External clock can be supported in an elegant way without any modification. The TCPServer (localhost:8888) function can send data stream to other applications (Example setup: AllanDEV, tap: 4, sample rate: 20.78 sps (Fast) or 10.39 sps (Slow), data stream: phase difference of DUT1 to REF1, Scale Factor: 20.78/20=1.039).

Notice:

1) Data streams sent to other applications were improperly truncated in previous versions. Thanks Leif (SM5BSZ) for his thorough and detailed feedback.

2) If you change the TAP (ENBW) value, the sampling rate will be truncated, for example, if TAP=5, the sampling rate will be 2 (NOT work with 2.078), which will raise calculation error. Scale Factor (1.039) should be entered to correct it.

3) Software version before V7.11 has critical error for a long time running for Allan Deviation.

4) The “Max” indication: depending on the “TAP” value and RAM size, the max available running time (theoretically) for Allan measurement.

To calculate the sample rate, note that the baseband signal’s rate is f_ADC/64 in fast mode (yielding 2,078,125 SPS) or f_ADC/128 in slow mode (yielding 1,039,062.5 SPS). With TAP set to 5, the signal is further decimated by 10^(1+TAP), which equals 1,000,000. Therefore, the final sample rate is 2.078125 SPS in fast mode or 1.0390625 SPS in slow mode.

Warning (know issues):

1) The phase difference of REF1-DUT1 (or REF2-DUT2) in the time domain has not been optimized by the filter, and there is a ringing phenomenon;

2) The phase difference will drift randomly. This issue is currently under investigation, and the following is an example of the phase drift observed in the self-correlation process. The raw data is also fed into stable32 [20] for further comparison.

The Device works as a Frequency Counter: The REF1 channel works as a reference, i.e., always assume the real frequency of the REF1 is equal to its nominal value. Then, the frequency of the DUT will be calculated accordingly.

7) Phase-locked Module Design

A phase-locked module is designed, where a CVHD-950X-125 is phase-locked to an old OCXO (CTI 10MHz). It can also be locked to any other VCXOs (<400MHz). This module can also be used as an external clock for the device. Note: A bandpass filter (e.g., 80M-140M) should be connected in series to filter the signal during this measurement.

8) Extreme Test: Direct measurement of a 1GHz DRO

A CCSO-914X3-1000 (CCSO-914X-1000 with a better performance) is measured directly (with a mini-circuits SLP-1200). The input signal is attenuated about 25dB by the front-end of the device in this scenario. CVCSO-914-1000 is another variant, which is a voltage-controlled version. Measurement of the CCSO-914X3-1000 with Down-Converters (Link) : within about 30 minutes.

Notes:

The best performance can be achieved in the First Nyquist Zone (1MHz-67.5MHz). At the second Nyquist Zone (67.5MHz-133MHz) and beyond, the measurement ability of the PN2060C will be degenerated gradually. Extremely, at 1GHz, the measurement only accurate within about 10KHz deviation (Filter should be adopted, otherwise, aliasing frequencies will contaminate the measurement result).

9) Down-Converter Modules (Link)

As the best performance is achieved in the first Nyquist Zone (1MHz-67.5MHz), down-converters are highly recommended beyond the first Nyquist Zone. Down-converters are designed by using Rogers RO4350B PCB material. Control board is an STM32 module. For best performance & low cost, batteries (18650) are used. Otherwise, a “clear” linear power supply should be utilized. The down-converter needs +5V (0.9A) power supply. Fan cooling is also necessary for a long time running. Used & economical 100M OCXO (SC-cut) is utilized. Brand-new 100M OCXO can also be adopted. To simplify the structure and power supply, an OCXO with a power splitter module can be used, featuring a socket for a 100MHz OCXO (25mm x 25mm size). By choosing an OCXO with a +5V supply, the entire system can be powered by a single +5V source, making the power supply more straightforward.

Usage of the Down-Converter: The frequency can be changed easily by four keys “< > + -” on the control board with a minimum step of 1KHz. Keep the frequencies of the down-converters 25MHz higher than the DUT. For example, if the DUT is 1000MHz, then let the frequencies of the down-converters to be 1025MHz. There is a 28MHz LPF inside the down-converter. The insertion loss of the down-converters is about -4.4dB at 3GHz. Always let the signal level <10dBm at the input port. 10dB power splitter (DC-12GHz, ZFRSC-123-S+) from mini-circuits is recommended. Totally, there is about 14dB losses @ 3GHz, i.e., if a 3GHz signal@0dBm is presented at input port, -14dBm will be displayed on the UI (DUT1, DUT2). The module can be used from 45M-9GHz without much degeneration. Extremely, it can be used to about 15GHz. However, degeneration can be over 30dB. The phase noise performance of the module is very similar with the simulation (by using the true phase noise value of the 100M reference). More Details of the down-converter. A new power supply module has been designed where all submodules operate on a +5V supply. Adequate filtering components have been incorporated, and a single +7.5V/2.5A supply is sufficient for the entire system.

10) Measurement Comparison of a 100M OCXO (2nd Nyquist Zone)

A 100M OCXO (XO5051) is measured by two methods: red-line – direct measurement with the PN2060C (V1.4), black line – measurement with down-converters. The comparison shown that the down-converter method can obtain the noise floor precisely while the direct measurement is limited to nearly -170dBc at 100MHz (Second Nyquist Zone). Comparison measurement is completed with the same sample. Band Pass Filter should be adopted beyond the 1^st Nyquist zone for a better performance when measuring the DUT directly. Following is an example, there is about 2dB improvement for the noise floor measurement (of 100M XO5051s). For laptops, DO NOT using external power supply, using its battery instead. The noise floor will be affected.

11) HP8664A Phase Noise Measurement

HP8664A is a canonical low phase noise signal generator. Following is the phase noise measurement of this unit (with option 004). The measurement results match the specification quiet well although this unit is nearly scrapped (>25 years old). The output level is +8dBm, and there are 10dB power splitter & -4dB insertion loss of the down-converter. So, the input level at DUT1 & DUT2 is about -5dBm. Comparison with TI’s measurement for the HP8664A (demo link) at 491.52MHz.

Suggestions for the Down-Converter Modules

a) Easier power supply for the down-converter modules: 7805 voltage regulators can be utilized to power the down-converter module and the control board separately (important for best performance, use separate batteries and 7805 for the down-converter module and the control board!).

b) An ADR4550ARZ daughter-board is designed, which can be used to tune the frequency of the 100M OCXO. The spurs can be minimized by tuning the frequencies of the 100M OCXOs.

12) New dual-channel down-converter by utilizing OCXOs (link)

As it is not easy to obtain a good phase noise with a tunable signal generator. OCXOs can be adopted. In this design, two 102.4MHz OCXOs (V3) (Video) are utilized to measure an old 100MHz NEL OCXO (some comparisons in [19], and thanks to Roman, the author of [19], for confirming the measurement results). So, the 2^nd Nyquist Zone (50M-150M) can be down-converted to the 1^st Nyquist Zone. The issues (aliasing frequencies & impedance mismatch & isolation & ADC jitter) can be greatly relieved. Artifacts are much less occurred when down-converted to the 1^st Nyquist Zone. 100M OCXOs can also be adopted as LOs in this setup. However, you cannot measure 100M with 100M LOs, which is wildly available and is an important frequency spot. If a frequency multiplier (such as 2x) is used, 150M-250M can be measured accordingly, and so on with 3x, 4x, … multipliers. The spurs are the frequency difference of the two customized 102.4M OCXOs, which can be tuned away by adjusting the frequency of one of them. With these high-performance OCXOs, the speed of measurement is much quicker than the former one. There is a socket for the 102.4M PCB module, allowing convenient replacement with other frequencies. The power supply (+5V nominal) is shared between the OCXO and the down-converter module for a single arm. As a result, the system can now operate efficiently with two 18650 batteries. Further measurement shows that the batteries can be substituted with a “clear” linear power supply (+5V, 1.5A max).

The converter is designed with an optimized additive phase noise, and with a conversion gain of +6dB. RF/LO: 10M-4G, IF: 1M-50M. Good phase noise can be easily achieved by frequency multipliers. Following are some modules under investment. For example, RMK-5-751 can be adopted to obtain a 500MHz signal with a very good phase noise.

Notes for this measurement:

1) Laptops using batteries instead of external power supply can achieve a better result than PCs, especially when the noise floor of a DUT goes below to -180dBc/Hz.

2) When go below to <-180dBc, the electromagnetic environment became sensitive (including nearby FM/TV stations in your local region), change a measurement place (for example, another room) if necessary.

3) The cable from the DUT to the device is very important. Make sure using cables with good shielding and as short as possible.

4）Critical Capacitors: One capacitor (100nF-2.2uF) should be placed as close as possible to the OCXO.

5) Further measurement shows that the batteries can be substituted with a “clear” linear power supply (+5V, 1.5A max) with a similar performance.

Ordering Information:

Option1: Dual-Channel Down-Converter Kit (2*down-converter-kit)

1) Rogers RO4350B PCB material.

2) Frequency Range: 45M-9GHz, workable to 15GHz but with great degeneration (30dB).

3) RF input level <10dBm

4) Conversion Loss -4dB@3GHz, typical.

5) Economical & used 100M Reference (XO5051 SC-cut).

6) Signal output 45M-22GHz, +8dBm to -5dBm, vary with frequency.

7) Phase noise specification (Integer-N mode, try to avoid fractional-N mode in this application if possible)

8) Batteries are not included

Notice:

1) Fan cooling is necessary for a long time running.

2) Each module should be powered separately (with separate batteries, very important).

Option2: OCXO References & New Down-Converters

Attentions:

1)The current is about 1.1-1.5A totally, which can vary with the frequency of the system’s clock. The USB3.0 of some PCs can not provide such a high current while some of them work normally. Some USB3.0 cards can be helpful. The following types of USB3.0 cards have been fully tested and verified.

Update for some mainboards: the economical one (MSI H610 Series) cannot work properly, MSI B760M is verified and running without problems.

2)The default clock is the internal one, with a fixed frequency of 133MHz, which can help you to verify the performance quickly. When you are familiar with this device, you can try to use an external high-quality clock. Some modifications (minor) are necessary when changing the system’s clock. Simulation results show that the following frequencies are “good” ones for a DUT of 10MHz: 13x.2MHz, 13x.4MHz, 13x.6MHz, 13x.8MHz, where “x” can be any value. These frequencies of the ADC clock generate little spurs when the frequency of the DUT or SYS_CLK is drifted. Then, it is easier to be removed by the algorithm. Method of switching to an external clock for V1.1: remove two capacitors as shown in the following figure. On the UI, select “CLK OUT”, the power supply of the internal clocks will be switched off. It is only for experiment, if handled improperly, damage maybe occurred.

3) A fan is installed internally. It can be removed to avoid noise and potential magnetic coupling between the fan and the rf transformers (many of them onboards). As the fan is running with a speed about 6000rpm (or about 100Hz), some spurs (100Hz, 200Hz, 300Hz, 400Hz, 500Hz, and etc.) maybe visible. And it is very interesting that the magnitude of these spurs can vary from one fan to another one as the magnetic distribution of a fan is different also. In other word, it can be used to detect how circular of the magnetic distribution of a fan.

4) The device should be connected to the USB3.0 interface in the back-panel of a PC, not the one in the front panel. The USB3.0 in the front panel usually has a long line connected to the motherboard with exposed connectors, where additional noises may be introduced and the noise floor may be degenerated also.

5)If the sampling frequency of the ADC is lower, the system’s noise floor may tend to be raised also, especially when the frequency of the DUT is high (e.g., 100MHz). It may be the ADC’s characteristics.

6)For the PN2060C V1.1, more filtering elements are added in the front-end of the ADCs. So, additional losses are induced.

7)The second-Nyquist zone and beyond: When diving into deep water area, all the phenomena reported in [1]-[3] can be encountered with different value of attenuators and with different bandwidth of filters. And aliasing may bring errors in noise floor measurements. An active power splitter is designed to perform some experiments. Test results shown that artifacts are more easily occurred with this active power-splitter.

8) Be careful of the phase difference between DUT1 & DUT2. According to [4], artifacts will be introduced with these differences. These kinds of artifacts are theoretically existed in the digital phase noise analyzer. FSWP utilizes another architecture which is trying to minimize them [5, p18].

9) Make a reliable connection between the type-C connector and the device. Always check the validity of the driver in “device manager”. Try to make a 180-degree rotation if necessary.

10) The measurement result of the noise floor tends to be raised-up in second-Nyquist and beyond according to [14], dual-channel down-converter can be adopted to eliminate this effect.

11) According to [6], dual channel down-converter can be designed. A frequency divider with a very good performance [11] is available in literature, and it may be used in this architecture. VK4ZXI (Drew Wollin) managed to make a measurement with his own setup [13].

Acknowledgements:

I would like to thank for Andrew Holme. In the very beginning of the development of the PNA, I have learned a lot from Andrew’s wonderful work [7] and also asked for some helps. In the process of my design, I have gradually developed my own codes from PN2060A to PN2060C. But still use part of Andrew’s source codes in current release. Andrew has granted permission for me to use his source codes. I would thanks to Jim Henderson, Pual Hsieh, and Drew Wollin for their valuable feedbacks and discussions, where Jim Henderson implemented a mixer-based down-converter to extend the frequency range. Drew Wollin has written an introduction and review for beginners [8]. Pual Hsieh has some valuable discussions with me for potential improvement. I am also would like to thanks IW3AUT for the file converter tool which makes it compatible with other applications [9].

Further reading about phase noise analyzer:

The principle and algorithm of the four-channel digital phase noise analyzer is detailed described in literature about 20 years ago [10]. Following figures [10] describe the detailed process of the four-channel. Firstly, the four channels are DDC (Digital Down Converted) to baseband (I,Q), and then, converted to amplitude and phase through a standard CORDIC algorithm. At last, all the data are uploaded to a PC, and processed according to these figures. There are a lot of such platforms available on market. I just build such a platform which I was preferred as no one such platform satisfy my requirement.

Rubiola’s phase noise website [12], where there are many important literature in this area, especially there are many new insights in their new book [16].

References:

[1] Y. Gruson, A. Rus, U. L. Rohde, A. Roth, and E. Rubiola, “Artifacts and errors in cross-spectrum phase noise measurements,” Metrologia, vol. 57, no. 5, pp. Art. no. 055 010 p. 1–12, Oct. 2020, open access.

[2] Y. Gruson, V. Giordano, U. L. Rohde, A. K. Poddar and E. Rubiola, "Cross-spectrum PM noise measurement thermal energy and metamaterial filters", IEEE Trans. Ultrason. Ferroelectr. Freq. Control, vol. 64, no. 3, pp. 634-642, Mar. 2017.

[3] Nelson CW, Hati A, Howe DA. “A collapse of the cross-spectral function in phase noise metrology”. Rev Sci Instrum. 2014 Feb;85(2):024705.

[4] Nelson, C.W., Hati, A. and Howe, D.A. (2013), Phase inversion and collapse of cross-spectral function. Electron. Lett., 49: 1640-1641. https://doi.org/10.1049/el.2013.3022

[5] https://scdn.rohde-schwarz.com/ur/pws/dl_downloads/dl_application/application_notes/1ef94___/1EF94_1e_Pulsed_Phase_Noise_Meas.pdf

[6] MicroChip. UHF and Microwave Measurements with the 53100A Phase Noise Analyzer(AN3899).

[7] Andrew Holme. http://www.aholme.co.uk/PhaseNoise/Main.htm

[8] Drew Wollin. https://vk4zxi.blogspot.com/2023/07/an-economical-way-to-measure-phase.html

[9] IW3AUT. http://www.iw3aut.altervista.org/wordpress/?page_id=1570

[10] Grove, J. et al., "Direct-digital phase-noise measurement," Proc. of 2004 IEEE International Frequency Control Symposium, Montreal, Canada, pp. 287-291, August 2004.

[11] M. M. Driscoll, "Phase noise performance of analog frequency dividers," in IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, vol. 37, no. 4, pp. 295-301, July 1990, doi: 10.1109/58.56490.

[12] https://rubiola.org

[13] https://vk4zxi.blogspot.com/2024/02/pn2060a-ghz-phase-noise-measurement.html

[14] https://scdn.rohde-schwarz.com/ur/pws/dl_downloads/dl_application/application_notes/1gp66/1GP66_4E.pdf

[15] S. R. Stein, "The Allan Variance - challenges and opportunities," in IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, vol. 57, no. 3, pp. 540-547, March 2010, doi: 10.1109/TUFFC.2010.1445.

[16] Ulrich L. Rohde, Enrico Rubiola, Jerry C. Whitaker. Microwave and Wireless Synthesizers: Theory and Design, Second Edition. John Wiley & Sons, Inc., 2021.

[17] P. De Visme, J. Imbaud, A. Holme and F. Sthal, "Comparison of an Affordable Open-Source Phase Noise Analyzer With Its Commercial Counterpart," in IEEE Transactions on Instrumentation and Measurement, vol. 73, pp. 1-7, 2024.

[18] M. Pomponio, A. Hati and C. Nelson, "Direct Digital Simultaneous Phase-Amplitude Noise and Allan Deviation Measurement System," in IEEE Open Journal of Ultrasonics, Ferroelectrics, and Frequency Control, vol. 4, pp. 160-170, 2024.

[19] https://abracon.com/uploads/resources/NEL-White-Paper-Testing-Phase-Noise-of-Ultra-Low-Phase-Noise-OCXOs.pdf

[20] http://www.stable32.com

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